Skip to content
This repository has been archived by the owner on Oct 2, 2020. It is now read-only.

[v6] Memory_* #3061

Open
1 task
chschlue opened this issue Sep 19, 2020 · 2 comments
Open
1 task

[v6] Memory_* #3061

chschlue opened this issue Sep 19, 2020 · 2 comments
Assignees
@cpresser
Labels
v6-medium
Milestone
6.0.0

Comments

@chschlue
Copy link
Contributor

chschlue commented Sep 19, 2020 •
edited by cpresser
Loading

  • Commonalize SPI Flashes
@chschlue chschlue added this to the 6.0.0 milestone Sep 19, 2020
@cpresser
Copy link
Contributor

Is there a use-case where people actually connect a SPI flash in daisy-chain configuration?
I am not aware of one, so I think it is a good idea to put all ports on the same side.
Perhaps like so
image

Here are some of the current AT25 style flashes. All look different:
image
image
image
image
image

@chschlue
Copy link
Contributor Author

Your example looks good to me.
Daisy chaining in conjunction with large reads doesn't make sense to me.

Sign up for free to subscribe to this conversation on GitHub. Already have an account? Sign in.
Assignees

@cpresser cpresser

Labels
v6-medium
Projects
None yet
Milestone
6.0.0
Development

No branches or pull requests
2 participants
@cpresser @chschlue