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tr3200.isf
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# Comment
<HEAD>
ISN:"TR3200"
ISD:"TR3200 CPU Instruction set 0.4.0"
# endian-ness LE (little endian)
CPUE:LE
# memory word size
CPUM:8
# cpu word size
CPUW:32
# file endian-ness, LE or BE only
FILEE:LE
# file word size
FILEW:8
ALIGN:4
</HEAD>
<REG>
# attribs set Index 32 bit,Data 32 bit,encode Length 5 (bits),Name"R"
+I32,D32,L5,N"R"
# name[,alias]:<encoding>
%r0:%0000
%r1:%0001
%r2:%0010
%r3:%0011
%r4:%0100
%r5:%0101
%r6:%0110
%r7:%0111
%r8:%1000
%r9:%1001
%r10:%1010
%r11,%y:%1011
%r12,%bp:%1100
%r13,%sp:%1101
%r14,%ia:%1110
%r15,%flags:%1111
# attrib set Special 32 bit, encode Length 4 bits
# Special reserves the names, they may or may not have encodings
+S32,L4
%pc
</REG>
<LIT>
# <num>[,<rangeend>]:<encoding>[:<extended encoding>]
# immediates for P3
+N"SI3",L14
-8192,8191:L14*
+N"LI3",L14
*:%00+0x000:+AL32*
# immediates for P2
+N"SI2",L18
-131072,131071:*
+N"LI2",L18
*:%00+0x0000:+AL32*
# immediate for P1
+N"IN1",L22
-2097152,2097151:%0+L22*
*:%100+0x00000:+AL32*
# P2 and P1 for jump codes
+N"SJ2",L18,M2
-524288,524284:*
+N"LJ2",L18
*:%00+0x0001:+AL32*
+N"JN1",L22,M2
-8388608,8388604:%0+L22*
*:%100+0x00000:+AL32*
</LIT>
<OPCODE>
# "NAME":params[,params...]:"paramformat":encoding
# \# is param referance
# Type + Opcode + M bit + L bit + paramaters
#
# -- P3 instructions ---------------------------------------------------------
# Rd,Rs,Rn Rn Rs Rd
AND:3:"R,R,R":L32 0x80+%00+\1+\2+%00+0x00+\3
AND:3:"R,R,SI3":L32 0x80+%10+\1+\2+\3
AND:3:"R,R,LI3":L32 0x80+%11+\1+\2+\3
OR:3:"R,R,R":L32 0x81+%00+\1+\2+%00+0x00+\3
OR:3:"R,R,SI3":L32 0x81+%10+\1+\2+\3
OR:3:"R,R,LI3":L32 0x81+%11+\1+\2+\3
XOR:3:"R,R,R":L32 0x82+%00+\1+\2+%00+0x00+\3
XOR:3:"R,R,SI3":L32 0x82+%10+\1+\2+\3
XOR:3:"R,R,LI3":L32 0x82+%11+\1+\2+\3
BITC:3:"R,R,R":L32 0x83+%00+\1+\2+%00+0x00+\3
BITC:3:"R,R,SI3":L32 0x83+%10+\1+\2+\3
BITC:3:"R,R,LI3":L32 0x83+%11+\1+\2+\3
#
ADD:3:"R,R,R":L32 0x84+%00+\1+\2+%00+0x00+\3
ADD:3:"R,R,SI3":L32 0x84+%10+\1+\2+\3
ADD:3:"R,R,LI3":L32 0x84+%11+\1+\2+\3
ADDC:3:"R,R,R":L32 0x85+%00+\1+\2+%00+0x00+\3
ADDC:3:"R,R,SI3":L32 0x85+%10+\1+\2+\3
ADDC:3:"R,R,LI3":L32 0x85+%11+\1+\2+\3
SUB:3:"R,R,R":L32 0x86+%00+\1+\2+%00+0x00+\3
SUB:3:"R,R,SI3":L32 0x86+%10+\1+\2+\3
SUB:3:"R,R,LI3":L32 0x86+%11+\1+\2+\3
SUBB:3:"R,R,R":L32 0x87+%00+\1+\2+%00+0x00+\3
SUBB:3:"R,R,SI3":L32 0x87+%10+\1+\2+\3
SUBB:3:"R,R,LI3":L32 0x87+%11+\1+\2+\3
RSB:3:"R,R,R":L32 0x88+%00+\1+\2+%00+0x00+\3
RSB:3:"R,R,SI3":L32 0x88+%10+\1+\2+\3
RSB:3:"R,R,LI3":L32 0x88+%11+\1+\2+\3
RSBB:3:"R,R,R":L32 0x89+%00+\1+\2+%00+0x00+\3
RSBB:3:"R,R,SI3":L32 0x89+%10+\1+\2+\3
RSBB:3:"R,R,LI3":L32 0x89+%11+\1+\2+\3
#
LLS:3:"R,R,R":L32 0x8A+%00+\1+\2+%00+0x00+\3
LLS:3:"R,R,SI3":L32 0x8A+%10+\1+\2+\3
LLS:3:"R,R,LI3":L32 0x8A+%11+\1+\2+\3
LRS:3:"R,R,R":L32 0x8B+%00+\1+\2+%00+0x00+\3
LRS:3:"R,R,SI3":L32 0x8B+%10+\1+\2+\3
LRS:3:"R,R,LI3":L32 0x8B+%11+\1+\2+\3
ARS:3:"R,R,R":L32 0x8C+%00+\1+\2+%00+0x00+\3
ARS:3:"R,R,SI3":L32 0x8C+%10+\1+\2+\3
ARS:3:"R,R,LI3":L32 0x8C+%11+\1+\2+\3
ROTL:3:"R,R,R":L32 0x8D+%00+\1+\2+%00+0x00+\3
ROTL:3:"R,R,SI3":L32 0x8D+%10+\1+\2+\3
ROTL:3:"R,R,LI3":L32 0x8D+%11+\1+\2+\3
ROTR:3:"R,R,R":L32 0x8E+%00+\1+\2+%00+0x00+\3
ROTR:3:"R,R,SI3":L32 0x8E+%10+\1+\2+\3
ROTR:3:"R,R,LI3":L32 0x8E+%11+\1+\2+\3
#
MUL:3:"R,R,R":L32 0x8F+%00+\1+\2+%00+0x00+\3
MUL:3:"R,R,SI3":L32 0x8F+%10+\1+\2+\3
MUL:3:"R,R,LI3":L32 0x8F+%11+\1+\2+\3
SMUL:3:"R,R,R":L32 0x90+%00+\1+\2+%00+0x00+\3
SMUL:3:"R,R,SI3":L32 0x90+%10+\1+\2+\3
SMUL:3:"R,R,LI3":L32 0x90+%11+\1+\2+\3
DIV:3:"R,R,R":L32 0x91+%00+\1+\2+%00+0x00+\3
DIV:3:"R,R,SI3":L32 0x91+%10+\1+\2+\3
DIV:3:"R,R,LI3":L32 0x91+%11+\1+\2+\3
SDIV:3:"R,R,R":L32 0x92+%00+\1+\2+%00+0x00+\3
SDIV:3:"R,R,SI3":L32 0x92+%10+\1+\2+\3
SDIV:3:"R,R,LI3":L32 0x92+%11+\1+\2+\3
# Rd,Rs,Rn Rd Rs Rn
LOAD:3:"R,R,R":L32 0x93+%00+\1+\2+%00+0x00+\3
LOAD:3:"R,R+R":L32 0x93+%00+\1+\2+%00+0x00+\3
LOAD:3:"R,[R+R]":L32 0x93+%00+\1+\2+%00+0x00+\3
LOAD:3:"R,R,SI3":L32 0x93+%10+\1+\2+\3
LOAD:3:"R,R+SI3":L32 0x93+%10+\1+\2+\3
LOAD:3:"R,[R+SI3]":L32 0x93+%10+\1+\2+\3
LOAD:3:"R,R,LI3":L32 0x93+%11+\1+\2+\3
LOAD:3:"R,R+LI3":L32 0x93+%11+\1+\2+\3
LOAD:3:"R,[R+LI3]":L32 0x93+%11+\1+\2+\3
# word loads
LOADW:3:"R,R,R":L32 0x94+%00+\1+\2+%00+0x00+\3
LOADW:3:"R,R+R":L32 0x94+%00+\1+\2+%00+0x00+\3
LOADW:3:"R,[R+R]":L32 0x94+%00+\1+\2+%00+0x00+\3
LOADW:3:"R,R,SI3":L32 0x94+%10+\1+\2+\3
LOADW:3:"R,R+SI3":L32 0x94+%10+\1+\2+\3
LOADW:3:"R,[R+SI3]":L32 0x94+%10+\1+\2+\3
LOADW:3:"R,R,LI3":L32 0x94+%11+\1+\2+\3
LOADW:3:"R,R+LI3":L32 0x94+%11+\1+\2+\3
LOADW:3:"R,[R+LI3]":L32 0x94+%11+\1+\2+\3
# byte loads
LOADB:3:"R,R,R":L32 0x95+%00+\1+\2+%00+0x00+\3
LOADB:3:"R,R+R":L32 0x95+%00+\1+\2+%00+0x00+\3
LOADB:3:"R,[R+R]":L32 0x95+%00+\1+\2+%00+0x00+\3
LOADB:3:"R,R,SI3":L32 0x95+%10+\1+\2+\3
LOADB:3:"R,R+SI3":L32 0x95+%10+\1+\2+\3
LOADB:3:"R,[R+SI3]":L32 0x95+%10+\1+\2+\3
LOADB:3:"R,R,LI3":L32 0x95+%11+\1+\2+\3
LOADB:3:"R,R+LI3":L32 0x95+%11+\1+\2+\3
LOADB:3:"R,[R+LI3]":L32 0x95+%11+\1+\2+\3
# Rs,Rn,Rd Rd Rs Rn
STORE:3:"R,R,R":L32 0x96+%00+\3+\1+%00+0x00+\2
STORE:3:"R+R,R":L32 0x96+%00+\3+\1+%00+0x00+\2
STORE:3:"[R+R],R":L32 0x96+%00+\3+\1+%00+0x00+\2
STORE:3:"R,SI3,R":L32 0x96+%10+\3+\1+\2
STORE:3:"R+SI3,R":L32 0x96+%10+\3+\1+\2
STORE:3:"[R+SI3],R":L32 0x96+%10+\3+\1+\2
STORE:3:"R,LI3,R":L32 0x96+%11+\3+\1+\2
STORE:3:"R+LI3,R":L32 0x96+%11+\3+\1+\2
STORE:3:"[R+LI3],R":L32 0x96+%11+\3+\1+\2
#
STOREW:3:"R,R,R":L32 0x97+%00+\3+\1+%00+0x00+\2
STOREW:3:"R+R,R":L32 0x97+%00+\3+\1+%00+0x00+\2
STOREW:3:"[R+R],R":L32 0x97+%00+\3+\1+%00+0x00+\2
STOREW:3:"R,SI3,R":L32 0x97+%10+\3+\1+\2
STOREW:3:"R+SI3,R":L32 0x97+%10+\3+\1+\2
STOREW:3:"[R+SI3],R":L32 0x97+%10+\3+\1+\2
STOREW:3:"R,LI3,R":L32 0x97+%11+\3+\1+\2
STOREW:3:"R+LI3,R":L32 0x97+%11+\3+\1+\2
STOREW:3:"[R+LI3],R":L32 0x97+%11+\3+\1+\2
STOREB:3:"R,R,R":L32 0x98+%00+\3+\1+%00+0x00+\2
STOREB:3:"R+R,R":L32 0x98+%00+\3+\1+%00+0x00+\2
STOREB:3:"[R+R],R":L32 0x98+%00+\3+\1+%00+0x00+\2
STOREB:3:"R,SI3,R":L32 0x98+%10+\3+\1+\2
STOREB:3:"R+SI3,R":L32 0x98+%10+\3+\1+\2
STOREB:3:"[R+SI3],R":L32 0x98+%10+\3+\1+\2
STOREB:3:"R,LI3,R":L32 0x98+%11+\3+\1+\2
STOREB:3:"R+LI3,R":L32 0x98+%11+\3+\1+\2
STOREB:3:"[R+LI3],R":L32 0x98+%11+\3+\1+\2
#
# -- P2 instructions ---------------------------------------------------------
MOV:2:"R,R":L32 0x40+%00+\1+%00+0x000+\2
MOV:2:"R,SI2":L32 0x40+%10+\1+\2
MOV:2:"R,LI2":L32 0x40+%11+\1+\2
SWP:2:"R,R":L32 0x41+%00+\1+%00+0x000+\2
NOT:2:"R,R":L32 0x42+%00+\1+%00+0x000+\2
NOT:2:"R,SI2":L32 0x42+%10+\1+\2
NOT:2:"R,LI2":L32 0x42+%11+\1+\2
#
SIGXB:2:"R,R":L32 0x43+%00+\1+%00+0x000+\2
SIGXB:2:"R,SI2":L32 0x43+%10+\1+\2
SIGXB:2:"R,LI2":L32 0x43+%11+\1+\2
SIGXW:2:"R,R":L32 0x44+%00+\1+%00+0x000+\2
SIGXW:2:"R,SI2":L32 0x44+%10+\1+\2
SIGXW:2:"R,LI2":L32 0x44+%11+\1+\2
# Rd,Rn
LOAD:2:"R,R":L32 0x45+%00+\1+%00+0x000+\2
LOAD:2:"R,[R]":L32 0x45+%00+\1+%00+0x000+\2
LOAD:2:"R,SI2":L32 0x45+%10+\1+\2
LOAD:2:"R,[SI2]":L32 0x45+%10+\1+\2
LOAD:2:"R,LI2":L32 0x45+%11+\1+\2
LOAD:2:"R,[LI2]":L32 0x45+%11+\1+\2
LOADW:2:"R,R":L32 0x46+%00+\1+%00+0x000+\2
LOADW:2:"R,[R]":L32 0x46+%00+\1+%00+0x000+\2
LOADW:2:"R,SI2":L32 0x46+%10+\1+\2
LOADW:2:"R,[SI2]":L32 0x46+%10+\1+\2
LOADW:2:"R,LI2":L32 0x46+%11+\1+\2
LOADW:2:"R,[LI2]":L32 0x46+%11+\1+\2
LOADB:2:"R,R":L32 0x47+%00+\1+%00+0x000+\2
LOADB:2:"R,[R]":L32 0x47+%00+\1+%00+0x000+\2
LOADB:2:"R,SI2":L32 0x47+%10+\1+\2
LOADB:2:"R,[SI2]":L32 0x47+%10+\1+\2
LOADB:2:"R,LI2":L32 0x47+%11+\1+\2
LOADB:2:"R,[LI2]":L32 0x47+%11+\1+\2
# Rn,Rd
STORE:2:"R,R":L32 0x48+%00+\2+%00+0x000+\1
STORE:2:"[R],R":L32 0x48+%00+\2+%00+0x000+\1
STORE:2:"SI2,R":L32 0x48+%10+\2+\1
STORE:2:"[SI2],R":L32 0x48+%10+\2+\1
STORE:2:"LI2,R":L32 0x48+%11+\2+\1
STORE:2:"[LI2],R":L32 0x48+%11+\2+\1
STOREW:2:"R,R":L32 0x49+%00+\2+%00+0x000+\1
STOREW:2:"[R],R":L32 0x49+%00+\2+%00+0x000+\1
STOREW:2:"SI2,R":L32 0x49+%10+\2+\1
STOREW:2:"[SI2],R":L32 0x49+%10+\2+\1
STOREW:2:"LI2,R":L32 0x49+%11+\2+\1
STOREW:2:"[LI2],R":L32 0x49+%11+\2+\1
STOREB:2:"R,R":L32 0x4A+%00+\2+%00+0x000+\1
STOREB:2:"[R],R":L32 0x4A+%00+\2+%00+0x000+\1
STOREB:2:"SI2,R":L32 0x4A+%10+\2+\1
STOREB:2:"[SI2],R":L32 0x4A+%10+\2+\1
STOREB:2:"LI2,R":L32 0x4A+%11+\2+\1
STOREB:2:"[LI2],R":L32 0x4A+%11+\2+\1
#
JMP:2:"R,R":L32 0x4B+%00+\1+%00+0x000+\2
JMP:2:"R,SJ2":L32 0x4B+%10+\1+\2
JMP:2:"R,LJ2":L32 0x4B+%11+\1+\2
CALL:2:"R,R":L32 0x4C+%00+\1+%00+0x000+\2
CALL:2:"R,SJ2":L32 0x4C+%10+\1+\2
CALL:2:"R,LJ2":L32 0x4C+%11+\1+\2
# Rd,Rn
IFEQ:2:"R,R":L32 0x70+%00+\1+%00+0x000+\2
IFEQ:2:"R,SI2":L32 0x70+%10+\1+\2
IFEQ:2:"R,LI2":L32 0x70+%11+\1+\2
IFNEQ:2:"R,R":L32 0x71+%00+\1+%00+0x000+\2
IFNEQ:2:"R,SI2":L32 0x71+%10+\1+\2
IFNEQ:2:"R,LI2":L32 0x71+%11+\1+\2
#
IFL:2:"R,R":L32 0x72+%00+\1+%00+0x000+\2
IFL:2:"R,SI2":L32 0x72+%10+\1+\2
IFL:2:"R,LI2":L32 0x72+%11+\1+\2
IFSL:2:"R,R":L32 0x73+%00+\1+%00+0x000+\2
IFSL:2:"R,SI2":L32 0x73+%10+\1+\2
IFSL:2:"R,LI2":L32 0x73+%11+\1+\2
IFLE:2:"R,R":L32 0x74+%00+\1+%00+0x000+\2
IFLE:2:"R,SI2":L32 0x74+%10+\1+\2
IFLE:2:"R,LI2":L32 0x74+%11+\1+\2
IFSLE:2:"R,R":L32 0x75+%00+\1+%00+0x000+\2
IFSLE:2:"R,SI2":L32 0x75+%10+\1+\2
IFSLE:2:"R,LI2":L32 0x75+%11+\1+\2
#
IFG:2:"R,R":L32 0x76+%00+\1+%00+0x000+\2
IFG:2:"R,SI2":L32 0x76+%10+\1+\2
IFG:2:"R,LI2":L32 0x76+%11+\1+\2
IFSG:2:"R,R":L32 0x77+%00+\1+%00+0x000+\2
IFSG:2:"R,SI2":L32 0x77+%10+\1+\2
IFSG:2:"R,LI2":L32 0x77+%11+\1+\2
IFGE:2:"R,R":L32 0x78+%00+\1+%00+0x000+\2
IFGE:2:"R,SI2":L32 0x78+%10+\1+\2
IFGE:2:"R,LI2":L32 0x78+%11+\1+\2
IFSGE:2:"R,R":L32 0x79+%00+\1+%00+0x000+\2
IFSGE:2:"R,SI2":L32 0x79+%10+\1+\2
IFSGE:2:"R,LI2":L32 0x79+%11+\1+\2
#
IFBITS:2:"R,R":L32 0x7A+%00+\1+%00+0x000+\2
IFBITS:2:"R,SI2":L32 0x7A+%10+\1+\2
IFBITS:2:"R,LI2":L32 0x7A+%11+\1+\2
IFCLEAR:2:"R,R":L32 0x7B+%00+\1+%00+0x000+\2
IFCLEAR:2:"R,SI2":L32 0x7B+%10+\1+\2
IFCLEAR:2:"R,LI2":L32 0x7B+%11+\1+\2
#
# -- P1 instructions ---------------------------------------------------------
XCHGB:1:"R":L32 0x20+0x00000+\1
XCHGW:1:"R":L32 0x21+0x00000+\1
#
GETPC:1:"R":L32 0x22+0x00000+\1
#
POP:1:"R":L32 0x23+0x00000+\1
PUSH:1:"R":L32 0x24+0x00000+\1
#
JMP:1:"R":L32 0x25+0x00000+\1
JMP:1:"JN1":L32 0x25+%1+\1
CALL:1:"R":L32 0x26+0x00000+\1
CALL:1:"JN1":L32 0x26+%1+\1
RJMP:1,r:"R":L32 0x27+0x00000+\1
RJMP:1,r:"JN1":L32 0x27+%1+\1
RCALL:1,r:"R":L32 0x28+0x00000+\1
RCALL:1,r:"JN1":L32 0x28+%1+\1
#
INT:1:"R":L32 0x29+0x00000+\1
INT:1:"IN1":L32 0x29+%10+\1
#
# -- NP instructions ---------------------------------------------------------
SLEEP:0::L32 0x00+0x000000
RET:0::L32 0x01+0x000000
RFI:0::L32 0x02+0x000000
</OPCODE>