From 8b13d0e47d48edb2ed1e15e6df908965d6698775 Mon Sep 17 00:00:00 2001
From: Eric Schweitz <eschweitz@nvidia.com>
Date: Wed, 18 Sep 2024 09:19:30 -0700
Subject: [PATCH] Fix check lines.

---
 test/Quake-QIR/argument.qke      | 20 ++++++++------------
 test/Quake-QIR/return_values.qke | 26 +++++++++++++-------------
 2 files changed, 21 insertions(+), 25 deletions(-)

diff --git a/test/Quake-QIR/argument.qke b/test/Quake-QIR/argument.qke
index e95e5abf2b..8b12b0e893 100644
--- a/test/Quake-QIR/argument.qke
+++ b/test/Quake-QIR/argument.qke
@@ -31,7 +31,7 @@ func.func @test_0(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.ptr<!cc.struct<{i
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_0({ { i32, double }*, i64 } 
-// CHECK-SAME:    %[[VAL_0:.*]]) {
+// CHECK-SAME:    %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = extractvalue { { i32, double }*, i64 } %[[VAL_0]], 0
 // CHECK:         %[[VAL_2:.*]] = extractvalue { { i32, double }*, i64 } %[[VAL_0]], 1
 // CHECK:         %[[VAL_3:.*]] = bitcast { i32, double }* %[[VAL_1]] to i8*
@@ -40,7 +40,7 @@ func.func @test_0(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.ptr<!cc.struct<{i
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_0(i8* nocapture readnone 
-// CHECK-SAME:    %[[VAL_0:.*]], { { i32, double }*, { i32, double }*, { i32, double }* }* nocapture readonly %[[VAL_1:.*]]) {
+// CHECK-SAME:    %[[VAL_0:.*]], { { i32, double }*, { i32, double }*, { i32, double }* }* nocapture readonly %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = getelementptr { { i32, double }*, { i32, double }*, { i32, double }* }, { { i32, double }*, { i32, double }*, { i32, double }* }* %[[VAL_1]], i64 0, i32 1
 // CHECK:         %[[VAL_3:.*]] = getelementptr { { i32, double }*, { i32, double }*, { i32, double }* }, { { i32, double }*, { i32, double }*, { i32, double }* }* %[[VAL_1]], i64 0, i32 0
 // CHECK:         %[[VAL_4:.*]] = load { i32, double }*, { i32, double }** %[[VAL_2]], align 8
@@ -78,7 +78,7 @@ func.func @test_1(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.struct<{!cc.ptr<i
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_1({ { i16*, i64 }, { float*, i64 } } 
-// CHECK-SAME:    %[[VAL_0:.*]]) {
+// CHECK-SAME:    %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = extractvalue { { i16*, i64 }, { float*, i64 } } %[[VAL_0]], 0
 // CHECK:         %[[VAL_2:.*]] = extractvalue { i16*, i64 } %[[VAL_1]], 0
 // CHECK:         %[[VAL_3:.*]] = extractvalue { i16*, i64 } %[[VAL_1]], 1
@@ -93,7 +93,7 @@ func.func @test_1(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.struct<{!cc.ptr<i
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_1(i8* nocapture readnone 
-// CHECK-SAME:    %[[VAL_0:.*]], { { i16*, i16*, i16* }, { float*, float*, float* } }* nocapture readonly %[[VAL_1:.*]]) {
+// CHECK-SAME:    %[[VAL_0:.*]], { { i16*, i16*, i16* }, { float*, float*, float* } }* nocapture readonly %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = getelementptr { { i16*, i16*, i16* }, { float*, float*, float* } }, { { i16*, i16*, i16* }, { float*, float*, float* } }* %[[VAL_1]], i64 0, i32 0, i32 1
 // CHECK:         %[[VAL_3:.*]] = getelementptr { { i16*, i16*, i16* }, { float*, float*, float* } }, { { i16*, i16*, i16* }, { float*, float*, float* } }* %[[VAL_1]], i64 0, i32 0, i32 0
 // CHECK:         %[[VAL_4:.*]] = load i16*, i16** %[[VAL_2]], align 8
@@ -139,7 +139,7 @@ func.func @test_2(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.ptr<!cc.struct<{i
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_2({ { i32, double }*, i64 } 
-// CHECK-SAME:    %[[VAL_0:.*]]) {
+// CHECK-SAME:    %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = extractvalue { { i32, double }*, i64 } %[[VAL_0]], 0
 // CHECK:         %[[VAL_2:.*]] = extractvalue { { i32, double }*, i64 } %[[VAL_0]], 1
 // CHECK:         %[[VAL_3:.*]] = bitcast { i32, double }* %[[VAL_1]] to i8*
@@ -148,7 +148,7 @@ func.func @test_2(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.ptr<!cc.struct<{i
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_2(i8* nocapture readnone 
-// CHECK-SAME:    %[[VAL_0:.*]], { { i32, double }*, { i32, double }*, { i32, double }* }* nocapture readonly %[[VAL_1:.*]]) {
+// CHECK-SAME:    %[[VAL_0:.*]], { { i32, double }*, { i32, double }*, { i32, double }* }* nocapture readonly %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = getelementptr { { i32, double }*, { i32, double }*, { i32, double }* }, { { i32, double }*, { i32, double }*, { i32, double }* }* %[[VAL_1]], i64 0, i32 1
 // CHECK:         %[[VAL_3:.*]] = getelementptr { { i32, double }*, { i32, double }*, { i32, double }* }, { { i32, double }*, { i32, double }*, { i32, double }* }* %[[VAL_1]], i64 0, i32 0
 // CHECK:         %[[VAL_4:.*]] = load { i32, double }*, { i32, double }** %[[VAL_2]], align 8
@@ -187,7 +187,7 @@ func.func @test_3(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.struct<{!cc.ptr<i
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_3({ { i16*, i64 }, { float*, i64 } } 
-// CHECK-SAME:    %[[VAL_0:.*]]) {
+// CHECK-SAME:    %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = extractvalue { { i16*, i64 }, { float*, i64 } } %[[VAL_0]], 0
 // CHECK:         %[[VAL_2:.*]] = extractvalue { i16*, i64 } %[[VAL_1]], 0
 // CHECK:         %[[VAL_3:.*]] = extractvalue { i16*, i64 } %[[VAL_1]], 1
@@ -202,7 +202,7 @@ func.func @test_3(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.struct<{!cc.ptr<i
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_3(i8* nocapture readnone 
-// CHECK-SAME:    %[[VAL_0:.*]], { { i16*, i16*, i16* }, { float*, float*, float* } }* nocapture readonly %[[VAL_1:.*]]) {
+// CHECK-SAME:    %[[VAL_0:.*]], { { i16*, i16*, i16* }, { float*, float*, float* } }* nocapture readonly %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = getelementptr { { i16*, i16*, i16* }, { float*, float*, float* } }, { { i16*, i16*, i16* }, { float*, float*, float* } }* %[[VAL_1]], i64 0, i32 0, i32 1
 // CHECK:         %[[VAL_3:.*]] = getelementptr { { i16*, i16*, i16* }, { float*, float*, float* } }, { { i16*, i16*, i16* }, { float*, float*, float* } }* %[[VAL_1]], i64 0, i32 0, i32 0
 // CHECK:         %[[VAL_4:.*]] = load i16*, i16** %[[VAL_2]], align 8
@@ -275,7 +275,6 @@ func.func @test_3(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.struct<{!cc.ptr<i
 
 // CHECK-LABEL: define void @test_0.kernelRegFunc() {
 // CHECK:         tail call void @cudaqRegisterKernelName(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_0.kernelName, i64 0, i64 0))
-// CHECK:         tail call void @__cudaq_registerLinkableKernel(i8* nonnull bitcast (void (i8*, { { i32, double }*, { i32, double }*, { i32, double }* }*)* @test_0 to i8*), i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_0.kernelName, i64 0, i64 0), i8* nonnull bitcast (void ({ { i32, double }*, i64 })* @__nvqpp__mlirgen__test_0 to i8*))
 // CHECK:         tail call void @cudaqRegisterArgsCreator(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_0.kernelName, i64 0, i64 0), i8* nonnull bitcast (i64 (i8**, i8**)* @test_0.argsCreator to i8*))
 // CHECK:         ret void
 // CHECK:       }
@@ -342,7 +341,6 @@ func.func @test_3(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.struct<{!cc.ptr<i
 
 // CHECK-LABEL: define void @test_1.kernelRegFunc() {
 // CHECK:         tail call void @cudaqRegisterKernelName(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_1.kernelName, i64 0, i64 0))
-// CHECK:         tail call void @__cudaq_registerLinkableKernel(i8* nonnull bitcast (void (i8*, { { i16*, i16*, i16* }, { float*, float*, float* } }*)* @test_1 to i8*), i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_1.kernelName, i64 0, i64 0), i8* nonnull bitcast (void ({ { i16*, i64 }, { float*, i64 } })* @__nvqpp__mlirgen__test_1 to i8*))
 // CHECK:         tail call void @cudaqRegisterArgsCreator(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_1.kernelName, i64 0, i64 0), i8* nonnull bitcast (i64 (i8**, i8**)* @test_1.argsCreator to i8*))
 // CHECK:         ret void
 // CHECK:       }
@@ -389,7 +387,6 @@ func.func @test_3(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.struct<{!cc.ptr<i
 
 // CHECK-LABEL: define void @test_2.kernelRegFunc() {
 // CHECK:         tail call void @cudaqRegisterKernelName(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_2.kernelName, i64 0, i64 0))
-// CHECK:         tail call void @__cudaq_registerLinkableKernel(i8* nonnull bitcast (void (i8*, { { i32, double }*, { i32, double }*, { i32, double }* }*)* @test_2 to i8*), i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_2.kernelName, i64 0, i64 0), i8* nonnull bitcast (void ({ { i32, double }*, i64 })* @__nvqpp__mlirgen__test_2 to i8*))
 // CHECK:         tail call void @cudaqRegisterArgsCreator(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_2.kernelName, i64 0, i64 0), i8* nonnull bitcast (i64 (i8**, i8**)* @test_2.argsCreator to i8*))
 // CHECK:         ret void
 // CHECK:       }
@@ -456,7 +453,6 @@ func.func @test_3(%0: !cc.ptr<i8>, %1: !cc.ptr<!cc.struct<{!cc.struct<{!cc.ptr<i
 
 // CHECK-LABEL: define void @test_3.kernelRegFunc() {
 // CHECK:         tail call void @cudaqRegisterKernelName(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_3.kernelName, i64 0, i64 0))
-// CHECK:         tail call void @__cudaq_registerLinkableKernel(i8* nonnull bitcast (void (i8*, { { i16*, i16*, i16* }, { float*, float*, float* } }*)* @test_3 to i8*), i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_3.kernelName, i64 0, i64 0), i8* nonnull bitcast (void ({ { i16*, i64 }, { float*, i64 } })* @__nvqpp__mlirgen__test_3 to i8*))
 // CHECK:         tail call void @cudaqRegisterArgsCreator(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_3.kernelName, i64 0, i64 0), i8* nonnull bitcast (i64 (i8**, i8**)* @test_3.argsCreator to i8*))
 // CHECK:         ret void
 // CHECK:       }
diff --git a/test/Quake-QIR/return_values.qke b/test/Quake-QIR/return_values.qke
index a13e1e47d1..a4fbfa7477 100644
--- a/test/Quake-QIR/return_values.qke
+++ b/test/Quake-QIR/return_values.qke
@@ -57,7 +57,7 @@ func.func @test_0(%1: !cc.ptr<!cc.struct<{!cc.ptr<i8>, !cc.ptr<i8>, !cc.ptr<i8>}
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_0({ i8*, i64 }* nocapture writeonly sret({ i8*, i64 }) 
-// CHECK-SAME:           %[[VAL_0:.*]], i32 %[[VAL_1:.*]]) {
+// CHECK-SAME:           %[[VAL_0:.*]], i32 %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = sext i32 %[[VAL_1]] to i64
 // CHECK:         %[[VAL_3:.*]] = tail call %[[VAL_4:.*]]* @__quantum__rt__qubit_allocate_array(i64 %[[VAL_2]])
 // CHECK:         %[[VAL_5:.*]] = tail call i64 @__quantum__rt__array_get_size_1d(%[[VAL_4]]* %[[VAL_3]])
@@ -104,7 +104,7 @@ func.func @test_0(%1: !cc.ptr<!cc.struct<{!cc.ptr<i8>, !cc.ptr<i8>, !cc.ptr<i8>}
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_0({ i8*, i8*, i8* }* sret({ i8*, i8*, i8* }) 
-// CHECK-SAME:       %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]], i32 %[[VAL_2:.*]]) {
+// CHECK-SAME:       %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]], i32 %[[VAL_2:.*]]) {{.*}}{
 // CHECK:         %[[VAL_3:.*]] = alloca { i32, { i1*, i64 } }, align 8
 // CHECK:         %[[VAL_4:.*]] = bitcast { i32, { i1*, i64 } }* %[[VAL_3]] to i8*
 // CHECK:         %[[VAL_5:.*]] = getelementptr inbounds { i32, { i1*, i64 } }, { i32, { i1*, i64 } }* %[[VAL_3]], i64 0, i32 0
@@ -141,7 +141,7 @@ func.func @test_1(%1: !cc.ptr<!cc.struct<{i1, i1}>> {llvm.sret = !cc.struct<{i1,
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_1({ i1, i1 }* nocapture writeonly sret({ i1, i1 }) 
-// CHECK-SAME:       %[[VAL_0:.*]]) {
+// CHECK-SAME:       %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = tail call %[[VAL_2:.*]]* @__quantum__rt__qubit_allocate_array(i64 2)
 // CHECK:         %[[VAL_3:.*]] = tail call i8* @__quantum__rt__array_get_element_ptr_1d(%[[VAL_2]]* %[[VAL_1]], i64 0)
 // CHECK:         %[[VAL_4:.*]] = bitcast i8* %[[VAL_3]] to %[[VAL_5:.*]]**
@@ -166,7 +166,7 @@ func.func @test_1(%1: !cc.ptr<!cc.struct<{i1, i1}>> {llvm.sret = !cc.struct<{i1,
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_1({ i1, i1 }* nocapture writeonly sret({ i1, i1 }) 
-// CHECK-SAME:      %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]]) {
+// CHECK-SAME:      %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = alloca [2 x i8], align 8
 // CHECK:         %[[VAL_3:.*]] = getelementptr inbounds [2 x i8], [2 x i8]* %[[VAL_2]], i64 0, i64 0
 // CHECK:         call void @altLaunchKernel(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_1.kernelName, i64 0, i64 0), i8* nonnull bitcast ({ i8*, i64 } (i8*, i1)* @test_1.thunk to i8*), i8* nonnull %[[VAL_3]], i64 2, i64 0)
@@ -201,13 +201,13 @@ func.func @test_2(%1: !cc.ptr<!cc.struct<{i16, f32, f64, i64}>> {llvm.sret = !cc
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_2({ i16, float, double, i64 }* nocapture writeonly sret({ i16, float, double, i64 }) 
-// CHECK-SAME:        %[[VAL_0:.*]]) #{{[0-9]+}} {
+// CHECK-SAME:        %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         store { i16, float, double, i64 } { i16 8, float 0x40159999A0000000, double 3.783000e+01, i64 1479 }, { i16, float, double, i64 }* %[[VAL_0]], align 8
 // CHECK:         ret void
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_2({ i16, float, double, i64 }* nocapture writeonly sret({ i16, float, double, i64 }) 
-// CHECK-SAME:          %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]]) {
+// CHECK-SAME:          %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = alloca { { i16, float, double, i64 } }, align 8
 // CHECK:         %[[VAL_3:.*]] = bitcast { { i16, float, double, i64 } }* %[[VAL_2]] to i8*
 // CHECK:         call void @altLaunchKernel(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_2.kernelName, i64 0, i64 0), i8* nonnull bitcast ({ i8*, i64 } (i8*, i1)* @test_2.thunk to i8*), i8* nonnull %[[VAL_3]], i64 24, i64 0)
@@ -247,7 +247,7 @@ func.func @test_3(%1: !cc.ptr<!cc.array<i64 x 5>> {llvm.sret = !cc.array<i64 x 5
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_3([5 x i64]* nocapture writeonly sret([5 x i64]) 
-// CHECK-SAME:        %[[VAL_0:.*]]) #{{[0-9]+}} {
+// CHECK-SAME:        %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = getelementptr inbounds [5 x i64], [5 x i64]* %[[VAL_0]], i64 0, i64 0
 // CHECK:         store i64 5, i64* %[[VAL_1]], align 8
 // CHECK:         %[[VAL_2:.*]] = getelementptr inbounds [5 x i64], [5 x i64]* %[[VAL_0]], i64 0, i64 1
@@ -262,7 +262,7 @@ func.func @test_3(%1: !cc.ptr<!cc.array<i64 x 5>> {llvm.sret = !cc.array<i64 x 5
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_3([5 x i64]* nocapture writeonly sret([5 x i64]) 
-// CHECK-SAME:      %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]]) {
+// CHECK-SAME:      %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = alloca { [5 x i64] }, align 8
 // CHECK:         %[[VAL_3:.*]] = bitcast { [5 x i64] }* %[[VAL_2]] to i8*
 // CHECK:         call void @altLaunchKernel(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_3.kernelName, i64 0, i64 0), i8* nonnull bitcast ({ i8*, i64 } (i8*, i1)* @test_3.thunk to i8*), i8* nonnull %[[VAL_3]], i64 40, i64 0)
@@ -300,7 +300,7 @@ func.func @test_4(%1: !cc.ptr<!cc.struct<{i64, f64}>> {llvm.sret = !cc.struct<{i
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_4({ i64, double }* nocapture writeonly sret({ i64, double }) 
-// CHECK-SAME:     %[[VAL_0:.*]]) #{{[0-9]+}} {
+// CHECK-SAME:     %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = getelementptr inbounds { i64, double }, { i64, double }* %[[VAL_0]], i64 0, i32 0
 // CHECK:         store i64 537892, i64* %[[VAL_1]], align 8
 // CHECK:         %[[VAL_2:.*]] = getelementptr { i64, double }, { i64, double }* %[[VAL_0]], i64 0, i32 1
@@ -309,7 +309,7 @@ func.func @test_4(%1: !cc.ptr<!cc.struct<{i64, f64}>> {llvm.sret = !cc.struct<{i
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_4({ i64, double }* nocapture writeonly sret({ i64, double }) 
-// CHECK-SAME:     %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]]) {
+// CHECK-SAME:     %[[VAL_0:.*]], i8* nocapture readnone %[[VAL_1:.*]]) {{.*}}{
 // CHECK:         %[[VAL_2:.*]] = alloca { i64, double }, align 8
 // CHECK:         %[[VAL_3:.*]] = bitcast { i64, double }* %[[VAL_2]] to i8*
 // CHECK:         call void @altLaunchKernel(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_4.kernelName, i64 0, i64 0), i8* nonnull bitcast ({ i8*, i64 } (i8*, i1)* @test_4.thunk to i8*), i8* nonnull %[[VAL_3]], i64 16, i64 0)
@@ -335,7 +335,7 @@ func.func @test_5(%0: !cc.ptr<!cc.struct<{i64, f64}>> {llvm.sret = !cc.struct<{i
 }
 
 // CHECK-LABEL: define void @__nvqpp__mlirgen__test_5({ i64, double }* nocapture writeonly sret({ i64, double }) 
-// CHECK-SAME:       %[[VAL_0:.*]]) #{{[0-9]+}} {
+// CHECK-SAME:       %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = getelementptr inbounds { i64, double }, { i64, double }* %[[VAL_0]], i64 0, i32 0
 // CHECK:         store i64 537892, i64* %[[VAL_1]], align 8
 // CHECK:         %[[VAL_2:.*]] = getelementptr { i64, double }, { i64, double }* %[[VAL_0]], i64 0, i32 1
@@ -344,7 +344,7 @@ func.func @test_5(%0: !cc.ptr<!cc.struct<{i64, f64}>> {llvm.sret = !cc.struct<{i
 // CHECK:       }
 
 // CHECK-LABEL: define void @test_5({ i64, double }* nocapture writeonly sret({ i64, double }) 
-// CHECK-SAME:       %[[VAL_0:.*]]) {
+// CHECK-SAME:       %[[VAL_0:.*]]) {{.*}}{
 // CHECK:         %[[VAL_1:.*]] = alloca { i64, double }, align 8
 // CHECK:         %[[VAL_2:.*]] = bitcast { i64, double }* %[[VAL_1]] to i8*
 // CHECK:         call void @altLaunchKernel(i8* nonnull getelementptr inbounds ([7 x i8], [7 x i8]* @test_5.kernelName, i64 0, i64 0), i8* nonnull bitcast ({ i8*, i64 } (i8*, i1)* @test_5.thunk to i8*), i8* nonnull %[[VAL_2]], i64 16, i64 0)
@@ -361,7 +361,7 @@ func.func @test_5(%0: !cc.ptr<!cc.struct<{i64, f64}>> {llvm.sret = !cc.struct<{i
 
 }
 
-
+//===----------------------------------------------------------------------===//
 
 // CHECK-LABEL: define i64 @test_0.returnOffset()
 // CHECK:         ret i64 8