kicad-gen-fabrication

#!/usr/bin/python
'''
    A python script example to create various plot files from a board:
    Fab files
    Doc files
    Gerber files

    Important note:
        this python script does not plot frame references.
        the reason is it is not yet possible from a python script because plotting
        plot frame references needs loading the corresponding page layout file
        (.wks file) or the default template.

        This info (the page layout template) is not stored in the board, and therefore
        not available.

        Do not try to change SetPlotFrameRef(False) to SetPlotFrameRef(true)
        the result is the pcbnew lib will crash if you try to plot
        the unknown frame references template.
'''

import sys, os, errno
from pcbnew import *

# output folders
fabrication_files = "fabrication"
gerber_files = fabrication_files + "/gerber"

ppfx = "prototype"
drill_folder = ppfx + "/drill"
pcb_folder = ppfx + "/copper"
map_folder = ppfx + "/assembly"
bom_folder = gerber_files

# create the prototype folder if not exists
def mkdir(name):
    try:
        os.makedirs(name)
    except OSError as e:
        if e.errno != errno.EEXIST:
            raise

# Create output folders
mkdir(ppfx)
mkdir(gerber_files)
mkdir(pcb_folder)
mkdir(map_folder)

try:
	filename=sys.argv[1]
except:
	import glob
	filename = glob.glob('./*.kicad_pcb')[0]

print("using kicad_pcb file: %s" % filename)
print "------------------------------------------"


file_basename = os.path.splitext(filename)[0]

board = LoadBoard(filename)

pctl = PLOT_CONTROLLER(board)

popt = pctl.GetPlotOptions()

# Set some important plot options:
popt.SetPlotFrameRef(False)
popt.SetLineWidth(FromMM(0.1))

popt.SetAutoScale(False)
popt.SetScale(1)
popt.SetMirror(False)
popt.SetUseGerberAttributes(True)
popt.SetExcludeEdgeLayer(False)
popt.SetUseAuxOrigin(True)


# Copper layer
# ----------------------------------------------
print "+ Generating copper layer ({0})".format(pcb_folder)
popt.SetOutputDirectory(pcb_folder)

# make sure that everything in plot-pcb folder is being renewed
if len(os.listdir(pcb_folder)) > 2:
    print "----------------------------------------------------"
    print "!! Delete additional files in {0} folder to make sure every file is up to date".format(pcb_folder)
    exit(2)

# Top Layer
popt.SetDrillMarksType(PCB_PLOT_PARAMS.SMALL_DRILL_SHAPE)
popt.SetMirror(True)
pctl.SetLayer(F_Cu)
pctl.OpenPlotfile("layer-F_Cu", PLOT_FORMAT_SVG, "Top Layer")
pctl.PlotLayer()

# Bottom Layer
popt.SetDrillMarksType(PCB_PLOT_PARAMS.SMALL_DRILL_SHAPE)
popt.SetMirror(False)
pctl.SetLayer(B_Cu)
pctl.OpenPlotfile("layer-B_Cu", PLOT_FORMAT_SVG, "Bottom Layer")
pctl.PlotLayer()


# Drill map
# ----------------------------------------------
print "+ Generating drill map ({0})".format(drill_folder)
popt.SetOutputDirectory(drill_folder)

# FIXME: workaround for setting GetPlotDirName
workaround_name = "workaround"
pctl.OpenPlotfile(workaround_name, PLOT_FORMAT_SVG, workaround_name)
workaround_file = os.path.join(pctl.GetPlotDirName(), (file_basename + '-' +  workaround_name + ".svg"))
os.remove(workaround_file)

drlwriter = EXCELLON_WRITER( board )
drlwriter.SetMapFileFormat( PLOT_FORMAT_PDF )

mirror = False
minimalHeader = False
offset = wxPoint(0,0)
# False to generate 2 separate drill files (one for plated holes, one for non plated holes)
# True to generate only one drill file
mergeNPTH = True
drlwriter.SetOptions( mirror, minimalHeader, offset, mergeNPTH )

metricFmt = True
drlwriter.SetFormat( metricFmt )

genDrl = False
genMap = True
drlwriter.CreateDrillandMapFilesSet( pctl.GetPlotDirName(), genDrl, genMap );



# Assembly Map
# ######################################################
sides = {
    'F': False,
    'B': True
}
layers = [
    'Cu',
    'Paste',
    'SilkS',
    'Fab'
    ]

print "+ Generating assembly map ({0}) with layers: {1}".format(
    map_folder,
    ', '.join(layers) )
popt.SetOutputDirectory(map_folder)

# We want *everything*
popt.SetPlotReference(True)
popt.SetPlotValue(True)
popt.SetPlotInvisibleText(True)

popt.SetDrillMarksType(PCB_PLOT_PARAMS.SMALL_DRILL_SHAPE)
pctl.SetColorMode(True)
popt.SetScale(1)
popt.SetLineWidth(FromMM(0.05))

for side in sides:
    images = ''


    # generate html files
    assembly_html = """
        <html>
            <head>
                <style>
                    @page {
                        size: landscape;
                        margin: 0;
                    }
                    img {
                        max-width: 100%;
                        max-height; 100%;
                    }
                    body {
                        padding: 5mm;
                    }
                    .stack {
                        position: absolute;
                    }
                    .container {
                        height: 190mm;
                        position: relative;
                        overflow: hidden;
                        border: 1px dashed black;

                    }
                    /* ---------- LAYERS ---------- */
                    .Cu{
                        opacity: 0.1;
                    }
                    .Paste {
                        opacity: 0.5;
                    }
                    .Fab, .SilkS {
                        /* use as is */
                    }
                </style>
                <link rel="stylesheet" type="text/css" href="./crop.css">
            </head>
            <body>
    """

    assembly_html += '''
        <div class="container">
            <h3><center>{0} ({1})</center></h3>
    '''.format(file_basename, side)

    for layer in layers:
        name = side + '_' + layer
        assembly_html += """
            <img
                src='{0}-{1}.svg'
                class='stack {2}'>
            </img>
        """.format(file_basename, name, layer)

        popt.SetMirror(sides[side])
        pctl.SetLayer(eval(name))
        pctl.OpenPlotfile(name, PLOT_FORMAT_SVG, "Assembly Layer")
        pctl.PlotLayer()

    assembly_html += '''
                </div>
            </body>
        </html>
    '''

    html_filename = os.path.join(pctl.GetPlotDirName(), 'assembly_map_{}.html'.format(side))
    with open(html_filename, "w") as f:
        f.write(assembly_html)


# fine tune with crop.css
crop_css = """
    .stack {
        transform: scale(2.3);
        position: relative;
        top: 180px;
        /* do not use `left: ...` or `right: ...` */
    }
    """
crop_filename = os.path.join(pctl.GetPlotDirName(), 'crop.css')
print "------------------------------------------"
try:
    with open(crop_filename, 'r') as x:
        print "crop.css already exists, not overwriting. "
except:
    with open(crop_filename, "w") as f:
        f.write(crop_css)
        print ''
        print '    TIP: Use crop.css for fine tuning (this file will not be overwritten)'
        print ''


pctl.ClosePlot()



# Generate Fabrication files
# =================================================================0
print "------------------------------------------"
import shutil

# Cleanup the output files
shutil.rmtree(gerber_files)
try:
    os.remove(fabrication_files + "/gerber.zip")
except:
    pass

# Drill file
# ----------------------------------------------
print "+ Generating drill file ({0})".format(gerber_files)
popt.SetOutputDirectory(gerber_files)

# FIXME: workaround for setting GetPlotDirName
workaround_name = "workaround"
pctl.OpenPlotfile(workaround_name, PLOT_FORMAT_SVG, workaround_name)
workaround_file = os.path.join(pctl.GetPlotDirName(), (file_basename + '-' +  workaround_name + ".svg"))
os.remove(workaround_file)

drlwriter = EXCELLON_WRITER( board )
drlwriter.SetMapFileFormat( PLOT_FORMAT_PDF )

mirror = False
minimalHeader = False
offset = wxPoint(0,0)
# False to generate 2 separate drill files (one for plated holes, one for non plated holes)
# True to generate only one drill file
mergeNPTH = True # DO NOT CHANGE
drlwriter.SetOptions( mirror, minimalHeader, offset, mergeNPTH )

metricFmt = True
drlwriter.SetFormat( metricFmt )

genDrl = True
genMap = False
drlwriter.CreateDrillandMapFilesSet( pctl.GetPlotDirName(), genDrl, genMap );

# Gerber files
# ----------------------------------------------
popt.SetOutputDirectory(gerber_files)
popt.SetExcludeEdgeLayer(True) # do not change
popt.SetMirror(False) # do not change
popt.SetUseGerberAttributes(False) # do not change
popt.SetUseGerberProtelExtensions(True) # do not change
popt.SetSubtractMaskFromSilk(False) # do not change
popt.SetLineWidth(FromMM(0.1))

gerber_layers = []
for side in sides:
    for layer in ['Cu','SilkS','Mask']:
        gerber_layers.append(side + '_' + layer)
gerber_layers.append("Edge_Cuts")

print "+ Generating Gerber files ({0}) ({1})".format(gerber_files, ', '.join(gerber_layers))
for name in gerber_layers:
    pctl.SetLayer(eval(name))
    # FIXME: There is a problem with PLOT_FORMAT_GERBER as it doesn't produce
    # the correct SilkS layer
    pctl.OpenPlotfile(name, PLOT_FORMAT_PDF, "bbb")
    pctl.PlotLayer()
pctl.ClosePlot()

print "+ Obfuscating generated Gerber files"
file_prefix = os.path.basename(file_basename)
def fp(name):
    return gerber_files + '/' + name

for filename in os.listdir(gerber_files):
    if filename.startswith(file_prefix):
        #print "filename: ", filename
        os.rename(fp(filename), fp(filename.replace(file_prefix, 'pcb')))

from textwrap import dedent
print "+ Adding generator scripts"
script_file = fabrication_files + "/generate-zip.sh"
with open(script_file, "w") as f:
    script = dedent("""
        #!/bin/bash
        name="gerber"
        echo "Removing former ${name}.zip file..."
        rm ${name}.zip 2> /dev/null
        echo "Creating new zip file from ${name} folder..."
        zip -r "${name}.zip" "${name}"
        """).strip()
    f.write(script)
os.chmod(script_file, 0755)


# Generate BOM
print "+ TODO: Add BOM"
with open(fabrication_files + '/TODO_ADD_BOM_HERE', "w") as f:
    f.write('')