Hdlparse is a simple package implementing a rudimentary parser for VHDL and Verilog. It is not capable of fully parsing the entire language. Rather, it is meant to extract enough key information from a source file to create generated documentation.
This library is forked from kevinpt via zhelnio. The aim of this fork is to provide some bug fixes and additional features to zhelnio's version of Hdlparse. A list of changes is included at the bottom of this README.
For VHDL this library can extract component, subprogram, type, subtype, and constant declarations from a package. For Verilog it can extract module declarations (both 1995 and 2001 syntax).
Hdlparse requires Python 3.x and no additional libraries. This version of Hdlparse is not compatible with Python2.
You can access the Hdlparse Git repository from Github. You can install direct from PyPI with the "pip" command if you have it available.
Hdlparse is a Python library. You must have Python installed first to use it. Most modern Linux distributions and OS/X have it available by default. There are a number of options available for Windows. If you don't already have a favorite, I recommend getting one of the "full-stack" Python distros that are geared toward scientific computing such as Anaconda or Python(x,y).
You need to have the Python setuptools installed first. If your OS has a package manager, it may be preferable to install setuptools through that tool. Otherwise you can use Pip:
> pip install setuptoolsIf you don't have pip you may have the easy_install command available which can be used to install pip on your system:
> easy_install pipYou can use pip to get the latest development code from Github:
> pip install --upgrade https://github.com/hdl/pyhdlparser/tarball/masterIf you manually downloaded a source package or created a clone with Git you can install with the following command run from the base Hdlparse directory:
> python setup.py installOn Linux systems you may need to install with root privileges using the sudo command.
After a successful install the Hdlparse library will be available.
The full documentation is available online at the main Hdlparse site.
A list of changes compared to the upstream is listed here:
- Improved support for VHDL and Verilog generics
- PEP8 compatible formatting
- Remove Python2 support
- Provide debugging information using the Python logging module