From 5107ecfbe366703a59772aae17e1c4c3715af519 Mon Sep 17 00:00:00 2001
From: Asherah Connor <ashe@kivikakk.ee>
Date: Wed, 12 Jun 2024 20:40:00 +0300
Subject: [PATCH] make it optional. big hack still!

---
 .../hrzn/chryse/platform/ice40/Ice40Top.scala | 30 ++++++++++++-------
 .../platform/ice40/IceBreakerPlatform.scala   | 12 ++++++--
 2 files changed, 29 insertions(+), 13 deletions(-)

diff --git a/src/main/scala/ee/hrzn/chryse/platform/ice40/Ice40Top.scala b/src/main/scala/ee/hrzn/chryse/platform/ice40/Ice40Top.scala
index 3c3ad85..885bd2b 100644
--- a/src/main/scala/ee/hrzn/chryse/platform/ice40/Ice40Top.scala
+++ b/src/main/scala/ee/hrzn/chryse/platform/ice40/Ice40Top.scala
@@ -27,6 +27,7 @@ import ee.hrzn.chryse.platform.ChryseTop
 import ee.hrzn.chryse.platform.PlatformBoard
 import ee.hrzn.chryse.platform.PlatformBoardResources
 import ee.hrzn.chryse.platform.ice40.inst.PinType
+import ee.hrzn.chryse.platform.ice40.inst.SB_GB_IO
 import ee.hrzn.chryse.platform.ice40.inst.SB_HFOSC
 import ee.hrzn.chryse.platform.ice40.inst.SB_IO
 import ee.hrzn.chryse.platform.resource.PinInt
@@ -96,18 +97,25 @@ class Ice40Top[Top <: Module](
     }
   }
 
-  private val clki = Wire(Clock())
+  private val default_clock = Wire(Clock())
 
-  // private val clk_gb = Module(new SB_GB_IO)
-  // clk_gb.PACKAGE_PIN := clki
-  // private val clk = clk_gb.GLOBAL_BUFFER_OUTPUT
-  private val hfosc = Module(new SB_HFOSC(div = 1))
-  hfosc.CLKHFEN := true.B
-  hfosc.CLKHFPU := true.B
-  private val clk = hfosc.CLKHF
+  private val clk        = Wire(Clock())
+  private var timerLimit = (15 * platform.clockHz / 1_000_000).toInt
+
+  // XXX
+  if (platform.asInstanceOf[IceBreakerPlatform].useHfosc.isDefined) {
+    val hfosc = Module(new SB_HFOSC(div = 1))
+    hfosc.CLKHFEN := true.B
+    hfosc.CLKHFPU := true.B
+    clk           := hfosc.CLKHF
+
+    timerLimit = (100 * platform.clockHz / 1_000_000).toInt
+  } else {
+    val clk_gb = Module(new SB_GB_IO)
+    clk_gb.PACKAGE_PIN := default_clock
+    clk                := clk_gb.GLOBAL_BUFFER_OUTPUT
+  }
 
-  // private val timerLimit = (15 * platform.clockHz / 1_000_000).toInt
-  private val timerLimit = (100 /* XXX */ * platform.clockHz / 1_000_000).toInt
   private val resetTimerReg =
     withClock(clk)(Reg(UInt(unsignedBitLength(timerLimit).W)))
   private val reset = Wire(Bool())
@@ -137,7 +145,7 @@ class Ice40Top[Top <: Module](
   // TODO (iCE40): allow clock source override.
 
   private val connectedResources =
-    connectResources(platform, Some(clki))
+    connectResources(platform, Some(default_clock))
 
   val pcf = Pcf(
     connectedResources
diff --git a/src/main/scala/ee/hrzn/chryse/platform/ice40/IceBreakerPlatform.scala b/src/main/scala/ee/hrzn/chryse/platform/ice40/IceBreakerPlatform.scala
index fe50dea..1f589ef 100644
--- a/src/main/scala/ee/hrzn/chryse/platform/ice40/IceBreakerPlatform.scala
+++ b/src/main/scala/ee/hrzn/chryse/platform/ice40/IceBreakerPlatform.scala
@@ -32,10 +32,18 @@ import ee.hrzn.chryse.platform.resource.Uart
 case class IceBreakerPlatform(
     ubtnReset: Boolean = false,
     inferSpram: Boolean = false,
+    useHfosc: Option[Int] = None,
 ) extends PlatformBoard[IceBreakerPlatformResources]
     with Ice40Platform {
-  val id      = "icebreaker"
-  val clockHz = 24_000_000 // XXX!
+  val id = "icebreaker"
+  val clockHz = useHfosc match {
+    case None      => 12_000_000
+    case Some(0)   => 48_000_000
+    case Some(1)   => 24_000_000
+    case Some(2)   => 12_000_000
+    case Some(3)   => 6_000_000
+    case Some(div) => throw new IllegalArgumentException(s"bad HFOSC div $div")
+  }
 
   override val ice40Args    = if (inferSpram) Seq("-spram") else Seq()
   override val ice40Variant = UP5K