All notable changes to this project will be documented in this file.
0.6.0 - 2019-11-24
- Add Python 3 compatibility.
- Add classes for managing call conventions.
- Add hook support to the
Emulator
class. - Add
cconv
(calling convention) module. - Add
ReilCpu
tests. - Add
replay
tool to replay x86 execution traces. - Add
x86.trace
module. - Add
x86.helper
module. - Add kao's toy project solution to the
examples
folder. - Add flare-on 2015 challenge #2 solution to the
examples
folder. - Add basic symbolic execution support.
- Add extra methods to
ReilSequence
andReilContainer
classes. - Improve hook support of the
Emulator
class. - Add support for
SHLD
instruction.
- Refactor ARM package.
- Refactor ARM tests.
- Refactor x86 package.
- Refactor x86 tests.
- Improve
emulate-binary
example script. - Refactor
ReilBuilder
class. - Refactor instruction translators (both Intel and ARM). Group translators by category and create a module for each one.
- Improve
Emulator
class. - Refactor
ReilCpu
tests. - Rename
bi
module tobinary
. - Refactor
Disassembler
class. - Refactor
ReilEmulatorTainter
class. - Refactor
ReilCpu
class. - Refactor
reil.helpers
module. - Refactor
ReilContainer
class. - Refactor
ReilBuilder
class. - Refactor
reil.tainter
module. - Refactor
ReilCpu
class. - Refactor
reil.parser
test module. - Refactor
reil.emulator
test module. - Rename
basicblock
package (and tests) tographs
. - Rename
gadget
package (and tests) togadgets
. - Rename
reilparser
module toreil.parser
. - Refactor
reilemulator
module. Split module into submodules:emulator.cpu
,emulator.emulator
,emulator.memory
, andemulator.tainter
. - Refactor
arch.emulator
module.
- Remove
DualInstruction
class.
- Fix
RSB
ARM instruction. - Fix control-flow graph rendering.
- Fix
SHRD
translation. - Fix size of effective address calculation for Intel architecture.
- Fix
SHL
andSHR
instruction translator.
0.5.0 - 2017-12-18
- Add architecture emulator class.
- Add support for Travis CI.
- Add tests for the
smt
package. - Add svg ouput format for
BARFcfg
andBARFcg
tools. - Add
Dockerfile
. - Add support for x86 instructions:
LAHF
,XADD
. - Add support for x86 sse instructions:
LDDQU
,MOVAPS
,MOVSD
.
- Restructure
examples
directory and remove redundant examples. - Restructure
tools
directory and move it intobarf
package. - Overall code quality improvement in most modules.
- Revamp
smt
package. - Refactor
codeanalyzer
module. - Improve code quality of
basicblock
module. - Restructure binary sample directory.
- Load all sections of a binary into memory by default.
- Update
ARM
architecural information. - Refactor
emulate
method to supportx86_64
,ARM
andThumb
code.
- Add
BAL
andBGT
to the list of ARM branch instructions. - Fix Capstone installation issues.
- Various fixes in the
smt
package.
- Remove
translation_mode
parameter from x86/ARM translators. - Remove deprecated
barf-install-solver.sh
script. - Remove
smtlibv2.py
module dependency fromPySymEmu
.
0.4.0 - 2017-04-10
- Update
README
to include new command line options for all BARF tools. - Add initial support for x86
AVX
instruction set. - Add support for x86 instructions:
BSF
,BSWAP
,BTS
,CDQ
,MOVSXD
andSHRD
. - Add support for x86 SSE instructions:
MOVD
,MOVDQA
,MOVDQU
,MOVHPD
,MOVLPD
,MOVQ
,PCMPEQB
,PMINUB
,PMOVMSKB
,POR
,PSHUFD
,PSLLDQ
,PSRLDQ
,PSUBB
,PUNPCKLBW
,PUNPCKLWD
,PUNPCKLQDQ
andPXOR
. - Add initial support for x86
SSE
instruction set. - Add support for
pdf
,png
anddot
output formats inBARFcfg
andBARFcg
tools. - Add option to display immediate operand values in
hex
anddec
to the CFG rendering. - Add REIL instruction index to the CFG rendering.
- Add support for missing x86 flag translations:
AF
andPF
. - Add new method to the
ArchitectureInformation
class to retrieve information about syscall instructions. - Add new x86 example for finding and executing functions.
- Add new methods to the
CallGraph
class. - Add initial support for
GS
andFS
segments access (x86).
- Improve coding style and code quality of the
reil
module. - Improve coding style and code quality of the
reilemulator
module. - Remove SMT requirement (an exception is raised when trying to use related functionality).
- Improve coding style and code quality of the
x86
package. - Improve
emulate_full
method to support any piece of code. - Refactor
_open_elf
logic in theBinaryFile
class by @Seraphime.
- Fix missing check on
recover_cfg
function parameters. - Update missing branch instructions in the
X86ArchitectureInformation
class. - Fix x86 instruction translation:
SAR
,SHR
,SHL
,ROR
,MOVZX
andMOV
. - Fix x86 gadget finding function.
- Fix various typos.
- Fix x86
REP
prefix parsing.
0.3 - 2016-12-13
- Add new BARF tool,
BARFcg
, for CG recovery. - Add support for CG recovery (x86 and ARM).
- Add new BARF tool,
BARFcfg
, for CFG recovery. - Add support for ARM CFG recovery.
- Add support for more ARM instructions.
- Add support for data tainting in
ReilEmulator
. - Add support for pre/post instruction execution callback function in
ReilEmulator
. - Add support for REIL extension instruction (
SEXT
,SDIV
,SMOD
). - Add support for more x86 instructions.
- Improve CFG recovery functionality.
- Refactor
basickblock
module. - Replace PyBFD with PyELFTools.
- Improve SMT performace.
- Refactor
smtlibv2
module. - Overall directory restructure.
- Improve ARM disassembly integration to Capstone Engine.
- Overall improvements to CFG recovery and rendering.
- Refactor
reilemulator
module. - Overall improvements to package's tests.
- Multiple bug fixes.
- Remove PyAsmJIT package from the repository (move to its own repo).
0.2.1 - 2015-04-07
- Fix Python logging module setup issue.
0.2 - 2015-04-06
BARFgadgets
now find gadgets in ARM binaries.- Add support for the ARM architecture (32 btis).
- Add support for more x86 instructions.
- Memory consumption reduction through the use of
__slots__
. BARFgadgets
now supports gadgets ending inRET imm16
,JMP
andCALL
instructions.
- Overall improvements to
x86
package (major changes that ended up in performance increase of translation up to 3x!). - Overall improvements to
reil
package (minor changes). - New reil translation scheme for x86 instructions.
x86translator
andx86instructiontranslator
modules were merged.- Some methods of
X86ArchitectureInformation
class were renamed to improve naming consistency. - x86 flags are now represented using a single bit (instead of one byte). Also, each flag (
CF
,ZF
, etc.) is now an alias of the correspondent bit of the{e/r}flags
register.
- Fixes in x86 instruction translations (mostly flags update issues.)
- Fix missing registers in
X86ArchitectureInformation
class. - Fix SMT translation for
STR
instruction when dst operand is bigger than src operand.
x86instruction
andx86intructiontranslator
modules were removed.
- First release.