From abb61f05ebe2d19e8313fd32e7921ee988fffa92 Mon Sep 17 00:00:00 2001
From: Jan Niehusmann <jan@gondor.com>
Date: Tue, 4 Feb 2025 14:18:50 +0100
Subject: [PATCH] Port on-target-tests to rp235x (#894)

* Make rp2040 dependencies optional in on-target tests
* Make rp2040 import conditional
* Port individual test to rp235x
---
 on-target-tests/.cargo/config.toml            | 23 ++++++
 on-target-tests/Cargo.toml                    | 10 ++-
 on-target-tests/build.rs                      | 32 ++++++++
 on-target-tests/{memory.x => memory_rp2040.x} |  0
 on-target-tests/memory_rp235x.x               | 77 +++++++++++++++++++
 on-target-tests/run_tests.bat                 |  2 +-
 on-target-tests/run_tests.sh                  |  2 +-
 on-target-tests/run_tests_rp235x.sh           |  6 ++
 on-target-tests/tests/dma_dyn.rs              | 16 +++-
 on-target-tests/tests/dma_m2m_u16.rs          | 16 +++-
 on-target-tests/tests/dma_m2m_u32.rs          | 16 +++-
 on-target-tests/tests/dma_m2m_u8.rs           | 16 +++-
 on-target-tests/tests/dma_spi_loopback_u16.rs | 22 +++++-
 on-target-tests/tests/dma_spi_loopback_u8.rs  | 26 +++++--
 on-target-tests/tests/gpio.rs                 | 13 +++-
 on-target-tests/tests/i2c_loopback.rs         | 10 +++
 on-target-tests/tests/i2c_loopback_async.rs   | 10 +++
 on-target-tests/tests/i2c_tests/blocking.rs   | 26 +++++--
 on-target-tests/tests/i2c_tests/mod.rs        |  9 ++-
 .../tests/i2c_tests/non_blocking.rs           | 15 ++--
 20 files changed, 312 insertions(+), 35 deletions(-)
 create mode 100644 on-target-tests/build.rs
 rename on-target-tests/{memory.x => memory_rp2040.x} (100%)
 create mode 100644 on-target-tests/memory_rp235x.x
 create mode 100755 on-target-tests/run_tests_rp235x.sh

diff --git a/on-target-tests/.cargo/config.toml b/on-target-tests/.cargo/config.toml
index e548cb625..4d20dbeff 100644
--- a/on-target-tests/.cargo/config.toml
+++ b/on-target-tests/.cargo/config.toml
@@ -35,3 +35,26 @@ runner = "elf2uf2-rs -d"
 # This runner will find a supported SWD debug probe and flash your RP2040 over
 # SWD:
 # runner = "probe-rs run --chip RP2040"
+
+# This is the hard-float ABI for Arm mode.
+#
+# The FPU is enabled by default, and float function arguments use FPU
+# registers.
+[target.thumbv8m.main-none-eabihf]
+# Pass some extra options to rustc, some of which get passed on to the linker.
+#
+# * linker argument --nmagic turns off page alignment of sections (which saves
+#   flash space)
+# * linker argument -Tlink.x tells the linker to use link.x as a linker script.
+#   This is usually provided by the cortex-m-rt crate, and by default the
+#   version in that crate will include a file called `memory.x` which describes
+#   the particular memory layout for your specific chip.
+# * linker argument -Tdefmt.x also tells the linker to use `defmt.x` as a
+#   secondary linker script. This is required to make defmt_rtt work.
+rustflags = [
+    "-C", "link-arg=--nmagic",
+    "-C", "link-arg=-Tlink.x",
+    "-C", "link-arg=-Tdefmt.x",
+    "-C", "target-cpu=cortex-m33",
+]
+
diff --git a/on-target-tests/Cargo.toml b/on-target-tests/Cargo.toml
index 50a734bd9..3ab7d4da9 100644
--- a/on-target-tests/Cargo.toml
+++ b/on-target-tests/Cargo.toml
@@ -62,8 +62,14 @@ i2c-write-iter = {version = "1.0.0", features = ["async"]}
 itertools = {version = "0.12.0", default-features = false}
 once_cell = { version = "1.19.0", default-features = false, features = ["critical-section"] }
 panic-probe = {version = "0.3", features = ["print-defmt"]}
-rp2040-boot2 = "0.3.0"
-rp2040-hal = {path = "../rp2040-hal", features = ["critical-section-impl", "defmt", "rt", "i2c-write-iter"]}
+rp2040-boot2 = { version = "0.3.0", optional = true }
+rp2040-hal = {path = "../rp2040-hal", features = ["critical-section-impl", "defmt", "rt", "i2c-write-iter"], optional = true}
+rp235x-hal = {path = "../rp235x-hal", features = ["critical-section-impl", "defmt", "rt", "i2c-write-iter"], optional = true}
+
+[features]
+
+rp2040 = ["dep:rp2040-boot2", "dep:rp2040-hal"]
+rp235x = ["dep:rp235x-hal"]
 
 [profile.dev]
 codegen-units = 1
diff --git a/on-target-tests/build.rs b/on-target-tests/build.rs
new file mode 100644
index 000000000..d88d873a8
--- /dev/null
+++ b/on-target-tests/build.rs
@@ -0,0 +1,32 @@
+//! Set up linker scripts for the rp235x-hal examples
+
+use std::fs::File;
+use std::io::Write;
+use std::path::PathBuf;
+
+fn main() {
+    // Put the linker script somewhere the linker can find it
+    let out = PathBuf::from(std::env::var_os("OUT_DIR").unwrap());
+    println!("cargo:rustc-link-search={}", out.display());
+
+    // The file `memory.x` is loaded by cortex-m-rt's `link.x` script, which
+    // is what we specify in `.cargo/config.toml` for Arm builds
+    #[cfg(feature = "rp2040")]
+    let memory_x = include_bytes!("memory_rp2040.x");
+    #[cfg(feature = "rp235x")]
+    let memory_x = include_bytes!("memory_rp235x.x");
+    let mut f = File::create(out.join("memory.x")).unwrap();
+    f.write_all(memory_x).unwrap();
+    println!("cargo:rerun-if-changed=memory.x");
+
+    /*
+    // The file `rp235x_riscv.x` is what we specify in `.cargo/config.toml` for
+    // RISC-V builds
+    let rp235x_riscv_x = include_bytes!("rp235x_riscv.x");
+    let mut f = File::create(out.join("rp235x_riscv.x")).unwrap();
+    f.write_all(rp235x_riscv_x).unwrap();
+    println!("cargo:rerun-if-changed=rp235x_riscv.x");
+    */
+
+    println!("cargo:rerun-if-changed=build.rs");
+}
diff --git a/on-target-tests/memory.x b/on-target-tests/memory_rp2040.x
similarity index 100%
rename from on-target-tests/memory.x
rename to on-target-tests/memory_rp2040.x
diff --git a/on-target-tests/memory_rp235x.x b/on-target-tests/memory_rp235x.x
new file mode 100644
index 000000000..7d409ba92
--- /dev/null
+++ b/on-target-tests/memory_rp235x.x
@@ -0,0 +1,77 @@
+MEMORY {
+    /*
+     * The RP2350 has either external or internal flash.
+     *
+     * 2 MiB is a safe default here, although a Pico 2 has 4 MiB.
+     */
+    FLASH : ORIGIN = 0x10000000, LENGTH = 2048K
+    /*
+     * RAM consists of 8 banks, SRAM0-SRAM7, with a striped mapping.
+     * This is usually good for performance, as it distributes load on
+     * those banks evenly.
+     */
+    RAM : ORIGIN = 0x20000000, LENGTH = 512K
+    /*
+     * RAM banks 8 and 9 use a direct mapping. They can be used to have
+     * memory areas dedicated for some specific job, improving predictability
+     * of access times.
+     * Example: Separate stacks for core0 and core1.
+     */
+    SRAM4 : ORIGIN = 0x20080000, LENGTH = 4K
+    SRAM5 : ORIGIN = 0x20081000, LENGTH = 4K
+}
+
+SECTIONS {
+    /* ### Boot ROM info
+     *
+     * Goes after .vector_table, to keep it in the first 4K of flash
+     * where the Boot ROM (and picotool) can find it
+     */
+    .start_block : ALIGN(4)
+    {
+        __start_block_addr = .;
+        KEEP(*(.start_block));
+        KEEP(*(.boot_info));
+    } > FLASH
+
+} INSERT AFTER .vector_table;
+
+/* move .text to start /after/ the boot info */
+_stext = ADDR(.start_block) + SIZEOF(.start_block);
+
+SECTIONS {
+    /* ### Picotool 'Binary Info' Entries
+     *
+     * Picotool looks through this block (as we have pointers to it in our
+     * header) to find interesting information.
+     */
+    .bi_entries : ALIGN(4)
+    {
+        /* We put this in the header */
+        __bi_entries_start = .;
+        /* Here are the entries */
+        KEEP(*(.bi_entries));
+        /* Keep this block a nice round size */
+        . = ALIGN(4);
+        /* We put this in the header */
+        __bi_entries_end = .;
+    } > FLASH
+} INSERT AFTER .text;
+
+SECTIONS {
+    /* ### Boot ROM extra info
+     *
+     * Goes after everything in our program, so it can contain a signature.
+     */
+    .end_block : ALIGN(4)
+    {
+        __end_block_addr = .;
+        KEEP(*(.end_block));
+    } > FLASH
+
+} INSERT AFTER .uninit;
+
+PROVIDE(start_to_end = __end_block_addr - __start_block_addr);
+PROVIDE(end_to_start = __start_block_addr - __end_block_addr);
+
+
diff --git a/on-target-tests/run_tests.bat b/on-target-tests/run_tests.bat
index f8fcfa61d..c428c7bf5 100755
--- a/on-target-tests/run_tests.bat
+++ b/on-target-tests/run_tests.bat
@@ -3,4 +3,4 @@
 
 @SET "CARGO_TARGET_THUMBV6M_NONE_EABI_RUNNER=probe-rs run"
 
-cargo test --no-fail-fast -- --chip rp2040
+cargo test --no-fail-fast --features rp2040 -- --chip rp2040
diff --git a/on-target-tests/run_tests.sh b/on-target-tests/run_tests.sh
index 326e7992b..05474a34a 100755
--- a/on-target-tests/run_tests.sh
+++ b/on-target-tests/run_tests.sh
@@ -3,4 +3,4 @@
 # Keep running tests even if one of them fails
 # We need to specify probe-rs as our runner via environment variables here
 # to control build since we aren't able to override them in config.toml
-CARGO_TARGET_THUMBV6M_NONE_EABI_RUNNER="probe-rs run" cargo test --no-fail-fast -- --chip rp2040
+CARGO_TARGET_THUMBV6M_NONE_EABI_RUNNER="probe-rs run" cargo test --no-fail-fast --features rp2040 -- --chip rp2040
diff --git a/on-target-tests/run_tests_rp235x.sh b/on-target-tests/run_tests_rp235x.sh
new file mode 100755
index 000000000..f59424923
--- /dev/null
+++ b/on-target-tests/run_tests_rp235x.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+# Keep running tests even if one of them fails
+# We need to specify probe-rs as our runner via environment variables here
+# to control build since we aren't able to override them in config.toml
+CARGO_TARGET_THUMBV8M_MAIN_NONE_EABIHF_RUNNER="probe-rs run" cargo test --target thumbv8m.main-none-eabihf --no-fail-fast --features rp235x -- --chip rp235x
diff --git a/on-target-tests/tests/dma_dyn.rs b/on-target-tests/tests/dma_dyn.rs
index 26a486c8c..cdca2c5c6 100644
--- a/on-target-tests/tests/dma_dyn.rs
+++ b/on-target-tests/tests/dma_dyn.rs
@@ -6,16 +6,26 @@ use crate::hal::dma::DynChannels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -51,11 +61,14 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
 
-    use rp2040_hal::dma::DMAExt;
+    use hal::dma::DMAExt;
 
     #[init]
     fn setup() -> State {
@@ -63,6 +76,7 @@ mod tests {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 
diff --git a/on-target-tests/tests/dma_m2m_u16.rs b/on-target-tests/tests/dma_m2m_u16.rs
index e6ae1f356..901f9f172 100644
--- a/on-target-tests/tests/dma_m2m_u16.rs
+++ b/on-target-tests/tests/dma_m2m_u16.rs
@@ -6,16 +6,26 @@ use crate::hal::dma::Channels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -47,11 +57,14 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
 
-    use rp2040_hal::dma::DMAExt;
+    use hal::dma::DMAExt;
 
     #[init]
     fn setup() -> State {
@@ -59,6 +72,7 @@ mod tests {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 
diff --git a/on-target-tests/tests/dma_m2m_u32.rs b/on-target-tests/tests/dma_m2m_u32.rs
index 7ea344422..79214f0e6 100644
--- a/on-target-tests/tests/dma_m2m_u32.rs
+++ b/on-target-tests/tests/dma_m2m_u32.rs
@@ -6,16 +6,26 @@ use crate::hal::dma::Channels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -47,11 +57,14 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
 
-    use rp2040_hal::dma::DMAExt;
+    use hal::dma::DMAExt;
 
     #[init]
     fn setup() -> State {
@@ -59,6 +72,7 @@ mod tests {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 
diff --git a/on-target-tests/tests/dma_m2m_u8.rs b/on-target-tests/tests/dma_m2m_u8.rs
index 7d8d5eac1..05c6275b3 100644
--- a/on-target-tests/tests/dma_m2m_u8.rs
+++ b/on-target-tests/tests/dma_m2m_u8.rs
@@ -6,16 +6,26 @@ use crate::hal::dma::Channels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -47,11 +57,14 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
 
-    use rp2040_hal::dma::DMAExt;
+    use hal::dma::DMAExt;
 
     #[init]
     fn setup() -> State {
@@ -59,6 +72,7 @@ mod tests {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 
diff --git a/on-target-tests/tests/dma_spi_loopback_u16.rs b/on-target-tests/tests/dma_spi_loopback_u16.rs
index 5062e95e7..8b456e56f 100644
--- a/on-target-tests/tests/dma_spi_loopback_u16.rs
+++ b/on-target-tests/tests/dma_spi_loopback_u16.rs
@@ -8,19 +8,29 @@ use crate::hal::dma::Channels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use hal::gpio::{self, Pin};
+use hal::pac::SPI0;
+use hal::spi;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
-use rp2040_hal::pac::SPI0;
-use rp2040_hal::spi;
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -56,11 +66,14 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use fugit::RateExtU32;
+    use hal::dma::{bidirectional, DMAExt};
+    use hal::Clock;
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
-    use rp2040_hal::dma::{bidirectional, DMAExt};
-    use rp2040_hal::Clock;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     #[init]
     fn setup() -> State {
@@ -68,6 +81,7 @@ mod tests {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 
diff --git a/on-target-tests/tests/dma_spi_loopback_u8.rs b/on-target-tests/tests/dma_spi_loopback_u8.rs
index 20b0f26c9..3af1d5b29 100644
--- a/on-target-tests/tests/dma_spi_loopback_u8.rs
+++ b/on-target-tests/tests/dma_spi_loopback_u8.rs
@@ -7,20 +7,30 @@
 use crate::hal::dma::Channels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
+use hal::gpio::{self, Pin};
+use hal::pac::SPI0;
+use hal::spi;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
-use rp2040_hal::gpio::{self, Pin};
-use rp2040_hal::pac::SPI0;
-use rp2040_hal::spi;
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -56,12 +66,15 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use fugit::RateExtU32;
+    use hal::dma::bidirectional;
+    use hal::dma::DMAExt;
+    use hal::Clock;
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
-    use rp2040_hal::dma::bidirectional;
-    use rp2040_hal::dma::DMAExt;
-    use rp2040_hal::Clock;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     #[init]
     fn setup() -> State {
@@ -69,6 +82,7 @@ mod tests {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 
diff --git a/on-target-tests/tests/gpio.rs b/on-target-tests/tests/gpio.rs
index d3930d87c..4e812b82c 100644
--- a/on-target-tests/tests/gpio.rs
+++ b/on-target-tests/tests/gpio.rs
@@ -5,16 +5,26 @@
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -25,8 +35,8 @@ mod tests {
     use crate::hal::clocks::init_clocks_and_plls;
     use crate::hal::pac;
     use crate::XTAL_FREQ_HZ;
+    use hal::gpio::{PinGroup, PinState};
     use hal::watchdog::Watchdog;
-    use rp2040_hal::gpio::{PinGroup, PinState};
 
     #[init]
     fn setup() -> () {
@@ -34,6 +44,7 @@ mod tests {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 
diff --git a/on-target-tests/tests/i2c_loopback.rs b/on-target-tests/tests/i2c_loopback.rs
index bad66a8ea..644258cae 100644
--- a/on-target-tests/tests/i2c_loopback.rs
+++ b/on-target-tests/tests/i2c_loopback.rs
@@ -12,7 +12,10 @@
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 use hal::pac::interrupt;
 
@@ -20,10 +23,17 @@ use hal::pac::interrupt;
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
diff --git a/on-target-tests/tests/i2c_loopback_async.rs b/on-target-tests/tests/i2c_loopback_async.rs
index b8d4543e0..97e323012 100644
--- a/on-target-tests/tests/i2c_loopback_async.rs
+++ b/on-target-tests/tests/i2c_loopback_async.rs
@@ -12,7 +12,10 @@
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 use hal::{async_utils::AsyncPeripheral, pac::interrupt};
 
@@ -20,10 +23,17 @@ use hal::{async_utils::AsyncPeripheral, pac::interrupt};
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
diff --git a/on-target-tests/tests/i2c_tests/blocking.rs b/on-target-tests/tests/i2c_tests/blocking.rs
index 1dbee7c84..da98aa464 100644
--- a/on-target-tests/tests/i2c_tests/blocking.rs
+++ b/on-target-tests/tests/i2c_tests/blocking.rs
@@ -2,9 +2,7 @@ use core::{cell::RefCell, ops::RangeInclusive};
 
 use critical_section::Mutex;
 use fugit::{HertzU32, RateExtU32};
-
-use rp2040_hal::{
-    self as hal,
+use hal::{
     clocks::init_clocks_and_plls,
     gpio::{FunctionI2C, Pin, PullUp},
     i2c::{Error, ValidAddress},
@@ -12,12 +10,19 @@ use rp2040_hal::{
     watchdog::Watchdog,
     Clock, Timer,
 };
+#[cfg(feature = "rp2040")]
+use rp2040_hal as hal;
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 use super::{Controller, FIFOBuffer, Generator, MutexCell, Target, TargetState};
 
 pub struct State {
     controller: Option<Controller>,
-    timer: hal::Timer,
+    #[cfg(feature = "rp2040")]
+    timer: Timer,
+    #[cfg(feature = "rp235x")]
+    timer: Timer<hal::timer::CopyableTimer0>,
     resets: hal::pac::RESETS,
     ref_clock_freq: HertzU32,
 }
@@ -25,7 +30,11 @@ pub struct State {
 static TARGET: MutexCell<Option<Target>> = Mutex::new(RefCell::new(None));
 
 static PAYLOAD: MutexCell<TargetState> = MutexCell::new(RefCell::new(TargetState::new()));
+#[cfg(feature = "rp2040")]
 static TIMER: MutexCell<Option<Timer>> = MutexCell::new(RefCell::new(None));
+#[cfg(feature = "rp235x")]
+static TIMER: MutexCell<Option<Timer<hal::timer::CopyableTimer0>>> =
+    MutexCell::new(RefCell::new(None));
 
 macro_rules! assert_vec_eq {
     ($e:expr) => {
@@ -67,7 +76,10 @@ pub fn setup<T: ValidAddress>(xtal_freq_hz: u32, addr: T) -> State {
     .ok()
     .unwrap();
 
+    #[cfg(feature = "rp2040")]
     let timer = hal::Timer::new(pac.TIMER, &mut pac.RESETS, &clocks);
+    #[cfg(feature = "rp235x")]
+    let timer = hal::Timer::new_timer0(pac.TIMER0, &mut pac.RESETS, &clocks);
 
     // The single-cycle I/O block controls our GPIO pins
     let mut sio = hal::Sio::new(pac.SIO);
@@ -103,7 +115,7 @@ pub fn setup<T: ValidAddress>(xtal_freq_hz: u32, addr: T) -> State {
 
     critical_section::with(|cs| TARGET.replace(cs, Some(i2c_target)));
 
-    static STACK: rp2040_hal::multicore::Stack<10240> = rp2040_hal::multicore::Stack::new();
+    static STACK: hal::multicore::Stack<10240> = hal::multicore::Stack::new();
     unsafe {
         // delegate I2C1 irqs to core 1
         hal::multicore::Multicore::new(&mut pac.PSM, &mut pac.PPB, &mut sio.fifo)
@@ -111,8 +123,8 @@ pub fn setup<T: ValidAddress>(xtal_freq_hz: u32, addr: T) -> State {
             .get_mut(1)
             .expect("core 1 is not available")
             .spawn(STACK.take().unwrap(), || {
-                pac::NVIC::unpend(hal::pac::Interrupt::I2C1_IRQ);
-                pac::NVIC::unmask(hal::pac::Interrupt::I2C1_IRQ);
+                cortex_m::peripheral::NVIC::unpend(hal::pac::Interrupt::I2C1_IRQ);
+                cortex_m::peripheral::NVIC::unmask(hal::pac::Interrupt::I2C1_IRQ);
 
                 loop {
                     cortex_m::asm::wfi()
diff --git a/on-target-tests/tests/i2c_tests/mod.rs b/on-target-tests/tests/i2c_tests/mod.rs
index 7cd1c0267..6a0a5aed8 100644
--- a/on-target-tests/tests/i2c_tests/mod.rs
+++ b/on-target-tests/tests/i2c_tests/mod.rs
@@ -1,14 +1,17 @@
 use core::cell::RefCell;
 
 use critical_section::Mutex;
-use rp2040_hal::{
-    self as hal,
+use hal::{
     gpio::{
         bank0::{Gpio0, Gpio1, Gpio2, Gpio3},
         FunctionI2C, Pin, PullUp,
     },
     i2c::peripheral::Event,
 };
+#[cfg(feature = "rp2040")]
+use rp2040_hal as hal;
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 pub mod blocking;
 pub mod non_blocking;
@@ -88,7 +91,7 @@ impl Iterator for Generator {
 
 fn target_handler(
     target: &mut Target,
-    evt: rp2040_hal::i2c::peripheral::Event,
+    evt: hal::i2c::peripheral::Event,
     payload: &mut TargetState,
     throttle: bool,
 ) {
diff --git a/on-target-tests/tests/i2c_tests/non_blocking.rs b/on-target-tests/tests/i2c_tests/non_blocking.rs
index 87cc111a9..7f65d1230 100644
--- a/on-target-tests/tests/i2c_tests/non_blocking.rs
+++ b/on-target-tests/tests/i2c_tests/non_blocking.rs
@@ -9,8 +9,7 @@ use fugit::{HertzU32, RateExtU32};
 use futures::FutureExt;
 use heapless::Vec;
 
-use rp2040_hal::{
-    self as hal,
+use hal::{
     clocks::init_clocks_and_plls,
     gpio::{FunctionI2C, Pin, PullUp},
     i2c::{Error, ValidAddress},
@@ -18,6 +17,10 @@ use rp2040_hal::{
     watchdog::Watchdog,
     Clock,
 };
+#[cfg(feature = "rp2040")]
+use rp2040_hal as hal;
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 use super::{Controller, FIFOBuffer, Generator, Target, TargetState};
 
@@ -100,10 +103,10 @@ pub fn setup<T: ValidAddress>(xtal_freq_hz: u32, addr: T) -> State {
     );
 
     unsafe {
-        pac::NVIC::unpend(hal::pac::Interrupt::I2C0_IRQ);
-        pac::NVIC::unmask(hal::pac::Interrupt::I2C0_IRQ);
-        pac::NVIC::unpend(hal::pac::Interrupt::I2C1_IRQ);
-        pac::NVIC::unmask(hal::pac::Interrupt::I2C1_IRQ);
+        cortex_m::peripheral::NVIC::unpend(hal::pac::Interrupt::I2C0_IRQ);
+        cortex_m::peripheral::NVIC::unmask(hal::pac::Interrupt::I2C0_IRQ);
+        cortex_m::peripheral::NVIC::unpend(hal::pac::Interrupt::I2C1_IRQ);
+        cortex_m::peripheral::NVIC::unmask(hal::pac::Interrupt::I2C1_IRQ);
     }
 
     State {