x86: PUSH FS/GS long mode improvements.

[Sleigh-InSPECtor]

In long-mode, PUSH instructions default to a 64-bit operand size, and the manual states: "If the source operand is a segment register (16 bits) and the operand size is 64-bits, a zero-extended value is pushed on the stack". Currently the SLEIGH spec adjusts RSP correctly but performs a 16-bit store leaving the upper bits unmodified.

Additionally, for segment register pushes the address size prefix should be ignored, but the operand override prefix needs to be accounted for.

This PR changes the pushseg88 macro to zero extend the input operand (the same macro is used in the CALLF which should also the upper 48-bits), and also fixes prefix handling.

• 0fa0 PUSH FS with RSP=0x1008, mem[0x1000]=aaaaaaaaaaaaaaaa

  • Hardware Reference (AMD CPU & Intel CPU): { RSP=0x1000, mem[0x1000]=0000000000000000 }
  • x86:LE:64:default (Existing): "PUSH FS" { RSP=0x1000, mem[0x1000]=0000aaaaaaaaaaaa }
  • x86:LE:64:default (This patch): "PUSH FS" { RSP=0x1000, mem[0x1000]=0000000000000000 }

• 67660fa0 PUSH FS with RSP=0x1008, mem[0x1000]=aaaaaaaaaaaaaaaa

  • Hardware Reference (AMD CPU & Intel CPU): { RSP=0x1006, mem[0x1000]=aaaaaaaaaaaa0000 }
  • x86:LE:64:default (Existing): Invalid instruction
  • x86:LE:64:default (This patch): "PUSH FS" { RSP=0x1006, mem[0x1000]=aaaaaaaaaaaa0000 }

(Note: The 32-bit variants use addrsize to choose whether to use the segment pcodeop, which is technically incorrect, see: #6601, but not included in this PR.)