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arch/arm/max326xx: add max32690 icc updates
Add updates for MAX32690 Instruction Cache Controller to enhance device support in NuttX architecture.
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/**************************************************************************** | ||
* arch/arm/src/max326xx/max32690/max32690_icc.c | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
* | ||
* Licensed to the Apache Software Foundation (ASF) under one or more | ||
* contributor license agreements. See the NOTICE file distributed with | ||
* this work for additional information regarding copyright ownership. The | ||
* ASF licenses this file to you under the Apache License, Version 2.0 (the | ||
* "License"); you may not use this file except in compliance with the | ||
* License. You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT | ||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the | ||
* License for the specific language governing permissions and limitations | ||
* under the License. | ||
* | ||
****************************************************************************/ | ||
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/**************************************************************************** | ||
* Included Files | ||
****************************************************************************/ | ||
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#include <nuttx/config.h> | ||
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#include <stdint.h> | ||
#include <stdbool.h> | ||
#include <assert.h> | ||
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#include "arm_internal.h" | ||
#include "hardware/max326_icc.h" | ||
#include "max326_periphclks.h" | ||
#include "max326_icc.h" | ||
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/**************************************************************************** | ||
* Public Functions | ||
****************************************************************************/ | ||
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/**************************************************************************** | ||
* Name: max326_icc_enable | ||
* | ||
* Description: | ||
* Enables or disables the instruction cache. | ||
* The MAX32690 actually has two cache controllers. | ||
* Support for the RISC-V core will be added later. | ||
* | ||
****************************************************************************/ | ||
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void max326_icc_enable(bool enable) | ||
{ | ||
uint32_t regval; | ||
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if (enable) | ||
{ | ||
/* Enable ICC peripheral clocking */ | ||
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max326_syscache_enableclk(); | ||
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putreg32(1, MAX326_ICC0_INVDTALL); | ||
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/* Enable the cache and wait for it to become ready */ | ||
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putreg32(ICC_CTRLSTAT_ENABLE, MAX326_ICC0_CTRLSTAT); | ||
do | ||
{ | ||
regval = getreg32(MAX326_ICC0_CTRLSTAT); | ||
} | ||
while ((regval & ICC_CTRLSTAT_READY) == 0); | ||
} | ||
else | ||
{ | ||
/* Disable the cache */ | ||
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putreg32(0, MAX326_ICC0_CTRLSTAT); | ||
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/* Disable clocking to the ICC peripheral */ | ||
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max326_syscache_disableclk(); | ||
} | ||
} | ||
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/**************************************************************************** | ||
* Name: max326_icc_invalidate | ||
* | ||
* Description: | ||
* Invalidate the instruction cache | ||
* | ||
****************************************************************************/ | ||
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void max326_icc_invalidate(void) | ||
{ | ||
/* Any write to the INVDTALL register will invalidate the entire cache. */ | ||
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putreg32(1, MAX326_ICC0_INVDTALL); | ||
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/* Wait for the cache to become ready again */ | ||
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while ((getreg32(MAX326_ICC0_CTRLSTAT) & ICC_CTRLSTAT_READY) == 0) | ||
{ | ||
} | ||
} | ||
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/**************************************************************************** | ||
* Name: up_addrenv_coherent | ||
* | ||
* Description: | ||
* Flush D-Cache and invalidate I-Cache in preparation for a change in | ||
* address environments. This should immediately precede a call to | ||
* up_addrenv_select(); | ||
* | ||
* Input Parameters: | ||
* addrenv - Describes the address environment to be made coherent. | ||
* | ||
* Returned Value: | ||
* Zero (OK) on success; a negated errno value on failure. | ||
* | ||
****************************************************************************/ | ||
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#ifdef CONFIG_ARCH_ADDRENV | ||
int up_addrenv_coherent(const arch_addrenv_t *addrenv) | ||
{ | ||
max326_icc_invalidate(); | ||
} | ||
#endif |