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WIP: Accelerate Unsafe CAS Intrinsics on Power and X #7438
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@hzongaro The @zlwang I need a review on the Power instructions being added. Also, would it be preferred if this PR was split into two? I was working on the Power and X accelerations at the same time and the end result just happened to be 2 fairly disjoint changes to OMR. |
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I think the changes for x/codegen/OMRCodeGenerator.cpp
and compiler/optimizer/RedundantAsyncCheckRemoval.cpp
look correct.
@zlwang did you get a chance to look over these changes? |
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LGTM
Adds lbarx, lharx, stbcx_r and sthcx_r instruction support for Power. These instructions are not currently in use but will be needed for future enhancements targetting CAS on byte and short length data. Updates willBeEvaluatedAsCallByCodeGen to reflect the new acceleration of Unsafe compareAndExchange methods on X. Signed-off-by: jimmyk <[email protected]>
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Adds lbarx, lharx, stbcx_r and sthcx_r instruction support for Power. These instructions are not currently in use but will be needed for future enhancements targetting CAS on byte and short length data.
Updates willBeEvaluatedAsCallByCodeGen to reflect the new acceleration of Unsafe compareAndExchange methods on X.
Edit:
X changes are dependent on this OpenJ9 PR:
eclipse-openj9/openj9#19991
Behavior of
inlineCompareAndSwapNative
andinlineCompareAndSwapObjectNative
inJ9TreeEvaluator.cpp
must match behavior inwillBeEvaluatedAsCallByCodeGen
inOMRCodeGenerator.cpp