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Welcome to the hwd-ide wiki!

This wiki started in tgingold/ghdl#111. It is meant to be a joint effort to bring together existing tools/apps/projects in order to achieve a libre framework/IDE for (V)HDL design.

• Personal expectations
• Parser(s)
• Visualization modules/plugins
  • Interactive tree
  • (RTL) Schematic view
  • Pipeline mapping and Gantt chart visualization
  • Waveform viewer
  • Data flow analysis
  • Clocking analysis
• (RTL) IDE
  • IDE in nodejs/electron
  • IDE in browser
• Documentation

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• Data format(s)
• Desktop
• Continuous Integration (CI) [Docker]
• Source Code Management (SCM)
• Code repositories and recipes

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• Learn how to code
• Target platforms

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• VHDL-Tools at University of Hamburg
• FPGALibre
• paebbels.github.io
• Eclipse
  • 7 Tips to Speed Up Eclipse
  • Veditor
  • IVI
• GitHub:nickg/nvc: VHDL compiler and simulator
• Torc: an open-source C++ infrastructure and tool set for reconfigurable computing.
• How to Build an Open Source FPGA Toolchain

Generators

• FloPoCo: circuits computing just right | FloPoCo is a generator of arithmetic cores (Floating-Point Cores, but not only) for FPGAs (but not only). The first motto of FloPoCo is that arithmetic on FPGAs should not mimick processor arithmetic. By designing radically new operators, one may obtain more accurate results with less hardware in less time. This thesis was first detailed in this document. The second motto of FloPoCo is to enable computing just right.