refactor & clean.

src/main/scala/ee/hrzn/chryse/ChryseApp.scala

@@ -22,14 +22,14 @@ import chisel3.Module
 import ee.hrzn.chryse.platform.Platform
 import ee.hrzn.chryse.platform.PlatformBoard
 import ee.hrzn.chryse.platform.PlatformBoardResources
-import ee.hrzn.chryse.platform.cxxrtl.CXXRTLOptions
+import ee.hrzn.chryse.platform.cxxrtl.CxxrtlOptions
 
 abstract class ChryseApp {
   val name: String
   def genTop()(implicit platform: Platform): Module
   val targetPlatforms: Seq[PlatformBoard[_ <: PlatformBoardResources]]
   val additionalSubcommands: Seq[ChryseSubcommand] = Seq()
-  val cxxrtlOptions: Option[CXXRTLOptions]         = None
+  val cxxrtlOptions: Option[CxxrtlOptions]         = None
 
   def main(args: Array[String]): Unit = {
     val conf = new ChryseScallopConf(this, args)

src/main/scala/ee/hrzn/chryse/ExampleApp.scala

@@ -20,10 +20,10 @@ package ee.hrzn.chryse
 
 import chisel3._
 import ee.hrzn.chryse.platform.Platform
-import ee.hrzn.chryse.platform.cxxrtl.CXXRTLOptions
-import ee.hrzn.chryse.platform.cxxrtl.CXXRTLPlatform
-import ee.hrzn.chryse.platform.ecp5.LFE5U_85F
-import ee.hrzn.chryse.platform.ecp5.ULX3SPlatform
+import ee.hrzn.chryse.platform.cxxrtl.CxxrtlOptions
+import ee.hrzn.chryse.platform.cxxrtl.CxxrtlPlatform
+import ee.hrzn.chryse.platform.ecp5.Lfe5U_85F
+import ee.hrzn.chryse.platform.ecp5.Ulx3SPlatform
 import ee.hrzn.chryse.platform.ice40.IceBreakerPlatform
 
 private[chryse] object ExampleApp extends ChryseApp {
@@ -32,9 +32,9 @@ private[chryse] object ExampleApp extends ChryseApp {
   override val name                                  = "example"
   override def genTop()(implicit platform: Platform) = new Top
   override val targetPlatforms =
-    Seq(IceBreakerPlatform(), ULX3SPlatform(LFE5U_85F))
+    Seq(IceBreakerPlatform(), Ulx3SPlatform(Lfe5U_85F))
   override val cxxrtlOptions = Some(
-    CXXRTLOptions(platforms = Seq(new CXXRTLPlatform("ex") {
+    CxxrtlOptions(platforms = Seq(new CxxrtlPlatform("ex") {
       val clockHz = 3_000_000
     })),
   )

src/main/scala/ee/hrzn/chryse/platform/cxxrtl/CXXRTLOptions.scala

@@ -22,13 +22,13 @@ import chisel3.experimental.ExtModule
 
 import scala.sys.process._
 
-final case class CXXRTLOptions(
-    platforms: Seq[CXXRTLPlatform],
+final case class CxxrtlOptions(
+    platforms: Seq[CxxrtlPlatform],
     blackboxes: Seq[Class[_ <: ExtModule]] = Seq(),
     cxxFlags: Seq[String] = Seq(),
     ldFlags: Seq[String] = Seq(),
     pkgConfig: Seq[String] = Seq(),
-    buildHooks: Seq[CXXRTLPlatform => Any] = Seq(),
+    buildHooks: Seq[CxxrtlPlatform => Any] = Seq(),
 ) {
   lazy val allCxxFlags: Seq[String] = cxxFlags ++ pkgConfig.flatMap(
     Seq("pkg-config", "--cflags", _).!!.trim.split(' '),

src/main/scala/ee/hrzn/chryse/platform/cxxrtl/CXXRTLPlatform.scala

@@ -21,7 +21,7 @@ package ee.hrzn.chryse.platform.cxxrtl
 import chisel3._
 import ee.hrzn.chryse.platform.ElaboratablePlatform
 
-abstract case class CXXRTLPlatform(id: String) extends ElaboratablePlatform {
+abstract case class CxxrtlPlatform(id: String) extends ElaboratablePlatform {
   type TopPlatform[Top <: Module] = Top
 
   override def apply[Top <: Module](genTop: => Top) =

src/main/scala/ee/hrzn/chryse/platform/ecp5/ECP5Platform.scala

@@ -24,25 +24,25 @@ import ee.hrzn.chryse.platform.PlatformBoard
 import ee.hrzn.chryse.platform.PlatformBoardResources
 import ee.hrzn.chryse.tasks.BaseTask
 
-trait ECP5Platform { this: PlatformBoard[_ <: PlatformBoardResources] =>
-  type TopPlatform[Top <: Module] = ECP5Top[Top]
+trait Ecp5Platform { this: PlatformBoard[_ <: PlatformBoardResources] =>
+  type TopPlatform[Top <: Module] = Ecp5Top[Top]
   case class BuildResult(bitPath: String, svfPath: String)
 
-  val ecp5Variant: ECP5Variant
+  val ecp5Variant: Ecp5Variant
   val ecp5Package: String
   val ecp5Speed: Int
   val ecp5PackOpts: Seq[String] = Seq()
 
   override def apply[Top <: Module](genTop: => Top) = {
     resources.setNames()
-    new ECP5Top(this, genTop)
+    new Ecp5Top(this, genTop)
   }
 
   def yosysSynthCommand(top: String) = s"synth_ecp5 -top $top"
 
   def build(
       chryse: ChryseApp,
-      topPlatform: ECP5Top[_],
+      topPlatform: Ecp5Top[_],
       jsonPath: String,
   ): BuildResult =
     buildImpl(this, chryse, topPlatform, jsonPath)
@@ -51,7 +51,7 @@ trait ECP5Platform { this: PlatformBoard[_ <: PlatformBoardResources] =>
     def apply(
         platform: PlatformBoard[_],
         chryse: ChryseApp,
-        topPlatform: ECP5Top[_],
+        topPlatform: Ecp5Top[_],
         jsonPath: String,
     ): BuildResult = {
       val name = chryse.name

src/main/scala/ee/hrzn/chryse/platform/ecp5/ECP5Top.scala

@@ -24,11 +24,16 @@ import ee.hrzn.chryse.chisel.directionOf
 import ee.hrzn.chryse.platform.ChryseTop
 import ee.hrzn.chryse.platform.PlatformBoard
 import ee.hrzn.chryse.platform.PlatformBoardResources
+import ee.hrzn.chryse.platform.ecp5.inst.FD1S3AX
+import ee.hrzn.chryse.platform.ecp5.inst.IB
+import ee.hrzn.chryse.platform.ecp5.inst.OBZ
+import ee.hrzn.chryse.platform.ecp5.inst.SGSR
+import ee.hrzn.chryse.platform.ecp5.inst.USRMCLK
 import ee.hrzn.chryse.platform.resource.PinPlatform
 import ee.hrzn.chryse.platform.resource.PinString
 import ee.hrzn.chryse.platform.resource.ResourceData
 
-class ECP5Top[Top <: Module](
+class Ecp5Top[Top <: Module](
     platform: PlatformBoard[_ <: PlatformBoardResources],
     genTop: => Top,
 ) extends RawModule
@@ -37,7 +42,7 @@ class ECP5Top[Top <: Module](
       name: String,
       res: ResourceData[_ <: Data],
   ): PlatformConnectResult = {
-    if (res.pinId == Some(PinPlatform(USRMCLKPin)) && res.ioInst.isDefined) {
+    if (res.pinId == Some(PinPlatform(UsrmclkPin)) && res.ioInst.isDefined) {
       val inst = Module(new USRMCLK)
       inst.USRMCLKI  := res.ioInst.get
       inst.USRMCLKTS := 0.U
@@ -102,11 +107,11 @@ class ECP5Top[Top <: Module](
   if (top.desiredName == desiredName)
     throw new IllegalArgumentException(s"user top is called $desiredName")
 
-  // TODO (ECP5): allow clock source override.
+  // TODO (Ecp5): allow clock source override.
 
   val connectedResources = connectResources(platform, Some(clk))
 
-  val lpf = LPF(
+  val lpf = Lpf(
     connectedResources
       .flatMap { case (name, cr) =>
         cr.pin match {

src/main/scala/ee/hrzn/chryse/platform/ecp5/ECP5Variant.scala

@@ -18,22 +18,22 @@
 
 package ee.hrzn.chryse.platform.ecp5
 
-sealed trait ECP5Variant {
+sealed trait Ecp5Variant {
   val id: String
   val arg: String
 }
 
-final case object LFE5U_25F extends ECP5Variant {
+final case object Lfe5U_25F extends Ecp5Variant {
   val id  = "25f"
   val arg = "--25k"
 }
 
-final case object LFE5U_45F extends ECP5Variant {
+final case object Lfe5U_45F extends Ecp5Variant {
   val id  = "45f"
   val arg = "--45k"
 }
 
-final case object LFE5U_85F extends ECP5Variant {
+final case object Lfe5U_85F extends Ecp5Variant {
   val id  = "85f"
   val arg = "--85k"
 }

src/main/scala/ee/hrzn/chryse/platform/ecp5/LPF.scala

@@ -23,7 +23,7 @@ import chisel3.experimental.Param
 import chisel3.experimental.StringParam
 import ee.hrzn.chryse.platform.resource.PinString
 
-final private[chryse] case class LPF(
+final private[chryse] case class Lpf(
     ios: Map[String, (PinString, Map[String, Param])],
     freqs: Map[String, BigInt],
 ) {

src/main/scala/ee/hrzn/chryse/platform/ecp5/OrangeCrabPlatform.scala

@@ -23,9 +23,9 @@ import ee.hrzn.chryse.platform.PlatformBoardResources
 import ee.hrzn.chryse.platform.resource.ClockSource
 
 // TODO: restrict the variants to those the OrangeCrab was delivered with.
-case class OrangeCrabPlatform(ecp5Variant: ECP5Variant)
+case class OrangeCrabPlatform(ecp5Variant: Ecp5Variant)
     extends PlatformBoard[OrangeCrabPlatformResources]
-    with ECP5Platform {
+    with Ecp5Platform {
   val id      = "orangecrab"
   val clockHz = 48_000_000
 

src/main/scala/ee/hrzn/chryse/platform/ecp5/ULX3SPlatform.scala

@@ -21,20 +21,21 @@ package ee.hrzn.chryse.platform.ecp5
 import chisel3._
 import ee.hrzn.chryse.platform.PlatformBoard
 import ee.hrzn.chryse.platform.PlatformBoardResources
+import ee.hrzn.chryse.platform.ecp5.inst.IOType
 import ee.hrzn.chryse.platform.resource.Button
 import ee.hrzn.chryse.platform.resource.ClockSource
 import ee.hrzn.chryse.platform.resource.Connector
-import ee.hrzn.chryse.platform.resource.LED
+import ee.hrzn.chryse.platform.resource.Led
 import ee.hrzn.chryse.platform.resource.ResourceData
-import ee.hrzn.chryse.platform.resource.SPI
-import ee.hrzn.chryse.platform.resource.UART
+import ee.hrzn.chryse.platform.resource.Spi
+import ee.hrzn.chryse.platform.resource.Uart
 import ee.hrzn.chryse.tasks.BaseTask
 
 // TODO: restrict the variants to those the ULX3S was delivered with.
 // TODO: try one of these: https://github.com/emard/ulx3s/blob/master/doc/MANUAL.md#programming-over-wifi-esp32-micropython
-case class ULX3SPlatform(ecp5Variant: ECP5Variant)
-    extends PlatformBoard[ULX3SPlatformResources]
-    with ECP5Platform {
+case class Ulx3SPlatform(ecp5Variant: Ecp5Variant)
+    extends PlatformBoard[Ulx3SPlatformResources]
+    with Ecp5Platform {
   val id      = s"ulx3s-${ecp5Variant.id}"
   val clockHz = 25_000_000
 
@@ -60,14 +61,14 @@ case class ULX3SPlatform(ecp5Variant: ECP5Variant)
       )
   }
 
-  val resources = new ULX3SPlatformResources
+  val resources = new Ulx3SPlatformResources
   override val programmingModes = Seq(
     ("sram", "Program the design to SRAM directly."),
     ("flash", "Program the design to the flash."),
   )
 }
 
-class ULX3SPlatformResources extends PlatformBoardResources {
+class Ulx3SPlatformResources extends PlatformBoardResources {
   // Pins match board version 3.0.8:
   // https://github.com/emard/ulx3s/tree/v3.0.8
 
@@ -76,17 +77,17 @@ class ULX3SPlatformResources extends PlatformBoardResources {
   val clock = ClockSource(25_000_000).onPin("G2")
 
   val program =
-    LED().onPin("M4").withAttributes(PullMode.UP)
+    Led().onPin("M4").withAttributes(PullMode.UP)
 
   // TODO: also expose RTS, DTR inputs.
-  var uart = UART()
+  var uart = Uart()
     .onPins(rx = "M1", tx = "L4")
   // TODO: either just unconditionally set this on, or only when uart.tx is
   // accessed.
   var uartTxEnable = ResourceData(Output(Bool())).onPin("L3")
 
   val leds = Connector(
-    LED().withAttributes("DRIVE" -> 4),
+    Led().withAttributes("DRIVE" -> 4),
     0 -> "B2",
     1 -> "C2",
     2 -> "C1",
@@ -97,9 +98,9 @@ class ULX3SPlatformResources extends PlatformBoardResources {
     7 -> "H3",
   )
 
-  val spiFlash = SPI()
+  val spiFlash = Spi()
     .onPins(
-      csN = "R2", clock = USRMCLKPin, copi = "W2", cipo = "V2", wpN = "Y2",
+      csN = "R2", clock = UsrmclkPin, copi = "W2", cipo = "V2", wpN = "Y2",
       holdN = "W1",
     )
     .withAttributes(PullMode.NONE, "DRIVE" -> 4)
@@ -130,12 +131,12 @@ class ULX3SPlatformResources extends PlatformBoardResources {
 
   // XXX pull-up on CIPO?
   // http://elm-chan.org/docs/mmc/mmc_e.html
-  val sdCard = SPI()
+  val sdCard = Spi()
     .onPins(csN = "K2", clock = "H2", copi = "J1", cipo = "J3")
 
   // SDRAM
 
-  val adc = SPI()
+  val adc = Spi()
     .onPins(csN = "R17", copi = "R16", cipo = "U16", clock = "P17")
     .withAttributes(PullMode.UP)
 

src/main/scala/ee/hrzn/chryse/platform/ecp5/USRMCLKPin.scala

@@ -23,7 +23,7 @@ import ee.hrzn.chryse.platform.resource.PinPlatform
 
 import scala.language.implicitConversions
 
-object USRMCLKPin {
+object UsrmclkPin {
   implicit def usrmclk2Pin(@annotation.unused usrmclk: this.type): Pin =
     PinPlatform(this)
 }

src/main/scala/ee/hrzn/chryse/platform/ecp5/FD1S3AX.scala → src/main/scala/ee/hrzn/chryse/platform/ecp5/inst/FD1S3AX.scala

@@ -16,7 +16,7 @@
  * along with Chryse. If not, see <https://www.gnu.org/licenses/>.
  */
 
-package ee.hrzn.chryse.platform.ecp5
+package ee.hrzn.chryse.platform.ecp5.inst
 
 import chisel3._
 import chisel3.experimental.ExtModule

src/main/scala/ee/hrzn/chryse/platform/ecp5/IB.scala → src/main/scala/ee/hrzn/chryse/platform/ecp5/inst/IB.scala

@@ -16,7 +16,7 @@
  * along with Chryse. If not, see <https://www.gnu.org/licenses/>.
  */
 
-package ee.hrzn.chryse.platform.ecp5
+package ee.hrzn.chryse.platform.ecp5.inst
 
 import chisel3._
 import chisel3.experimental.ExtModule

src/main/scala/ee/hrzn/chryse/platform/ecp5/IOType.scala → src/main/scala/ee/hrzn/chryse/platform/ecp5/inst/IOType.scala

@@ -16,7 +16,7 @@
  * along with Chryse. If not, see <https://www.gnu.org/licenses/>.
  */
 
-package ee.hrzn.chryse.platform.ecp5
+package ee.hrzn.chryse.platform.ecp5.inst
 
 import chisel3.experimental.StringParam
 

src/main/scala/ee/hrzn/chryse/platform/ecp5/OBZ.scala → src/main/scala/ee/hrzn/chryse/platform/ecp5/inst/OBZ.scala

@@ -16,7 +16,7 @@
  * along with Chryse. If not, see <https://www.gnu.org/licenses/>.
  */
 
-package ee.hrzn.chryse.platform.ecp5
+package ee.hrzn.chryse.platform.ecp5.inst
 
 import chisel3._
 import chisel3.experimental.ExtModule

src/main/scala/ee/hrzn/chryse/platform/ecp5/SGSR.scala → src/main/scala/ee/hrzn/chryse/platform/ecp5/inst/SGSR.scala

@@ -16,7 +16,7 @@
  * along with Chryse. If not, see <https://www.gnu.org/licenses/>.
  */
 
-package ee.hrzn.chryse.platform.ecp5
+package ee.hrzn.chryse.platform.ecp5.inst
 
 import chisel3._
 import chisel3.experimental.ExtModule

src/main/scala/ee/hrzn/chryse/platform/ecp5/USRMCLK.scala → src/main/scala/ee/hrzn/chryse/platform/ecp5/inst/USRMCLK.scala

@@ -16,7 +16,7 @@
  * along with Chryse. If not, see <https://www.gnu.org/licenses/>.
  */
 
-package ee.hrzn.chryse.platform.ecp5
+package ee.hrzn.chryse.platform.ecp5.inst
 
 import chisel3._
 import chisel3.experimental.ExtModule

src/main/scala/ee/hrzn/chryse/platform/ice40/ICE40Platform.scala

@@ -24,23 +24,23 @@ import ee.hrzn.chryse.platform.PlatformBoard
 import ee.hrzn.chryse.platform.PlatformBoardResources
 import ee.hrzn.chryse.tasks.BaseTask
 
-trait ICE40Platform { this: PlatformBoard[_ <: PlatformBoardResources] =>
-  type TopPlatform[Top <: Module] = ICE40Top[Top]
+trait Ice40Platform { this: PlatformBoard[_ <: PlatformBoardResources] =>
+  type TopPlatform[Top <: Module] = Ice40Top[Top]
   type BuildResult                = String
 
-  val ice40Variant: ICE40Variant
+  val ice40Variant: Ice40Variant
   val ice40Package: String
 
   override def apply[Top <: Module](genTop: => Top) = {
     resources.setNames()
-    new ICE40Top(this, genTop)
+    new Ice40Top(this, genTop)
   }
 
   def yosysSynthCommand(top: String) = s"synth_ice40 -top $top"
 
   def build(
       chryse: ChryseApp,
-      topPlatform: ICE40Top[_],
+      topPlatform: Ice40Top[_],
       jsonPath: String,
   ): String =
     buildImpl(this, chryse, topPlatform, jsonPath)
@@ -49,7 +49,7 @@ trait ICE40Platform { this: PlatformBoard[_ <: PlatformBoardResources] =>
     def apply(
         platform: PlatformBoard[_],
         chryse: ChryseApp,
-        topPlatform: ICE40Top[_],
+        topPlatform: Ice40Top[_],
         jsonPath: String,
     ): String = {
       val name = chryse.name