Skip to content
This repository has been archived by the owner on Jun 16, 2024. It is now read-only.

Commit

Permalink
ULX3S: programming it works, though not yet figured out SPI flash.
Browse files Browse the repository at this point in the history
  • Loading branch information
kivikakk committed May 29, 2024
1 parent c6e3e00 commit da11870
Show file tree
Hide file tree
Showing 7 changed files with 58 additions and 25 deletions.
10 changes: 2 additions & 8 deletions src/main/scala/ee/hrzn/chryse/platform/ecp5/ECP5Platform.scala
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@ trait ECP5Platform { this: PlatformBoard[_ <: PlatformBoardResources] =>
val ecp5Variant: ECP5Variant
val ecp5Package: String
val ecp5Speed: Int
val ecp5PackOpts: Seq[String] = Seq()

override def apply[Top <: Module](genTop: => Top) = {
resources.setNames()
Expand Down Expand Up @@ -72,18 +73,11 @@ trait ECP5Platform { this: PlatformBoard[_ <: PlatformBoardResources] =>
Seq(),
bitPath,
Seq("ecppack", "--input", textcfgPath, "--bit", bitPath, "--svf",
svfPath),
svfPath) ++ ecp5PackOpts,
)
runCu(CmdStepPack, bitCu)

BuildResult(bitPath, svfPath)
}
}

def program(bitAndSvf: BuildResult): Unit =
programImpl(bitAndSvf)

private object programImpl extends BaseTask {
def apply(bitAndSvf: BuildResult): Unit = ???
}
}
10 changes: 8 additions & 2 deletions src/main/scala/ee/hrzn/chryse/platform/ecp5/ECP5Top.scala
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@ import ee.hrzn.chryse.platform.ChryseTop
import ee.hrzn.chryse.platform.Platform
import ee.hrzn.chryse.platform.PlatformBoard
import ee.hrzn.chryse.platform.PlatformBoardResources
import ee.hrzn.chryse.platform.resource.PinPlatform
import ee.hrzn.chryse.platform.resource.PinString
import ee.hrzn.chryse.platform.resource.ResourceData

Expand All @@ -17,8 +18,13 @@ class ECP5Top[Top <: Module](
name: String,
res: ResourceData[_ <: Data],
): PlatformConnectResult = {
println(s"evaluating: $name / $res")
// TODO (ECP5): USRMCLK
if (res.pinId == Some(PinPlatform(USRMCLKPin)) && res.ioInst.isDefined) {
val inst = Module(new USRMCLK)
inst.USRMCLKI := res.ioInst.get
inst.USRMCLKTS := 0.U
return PlatformConnectResultNoop
}

PlatformConnectResultFallthrough
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,8 @@ case class OrangeCrabPlatform(ecp5Variant: ECP5Variant)
val ecp5Package = "csfBGA285"
val ecp5Speed = 8

def program(binPath: BuildResult): Unit = ???

val resources = new OrangeCrabPlatformResources
}

Expand Down
30 changes: 26 additions & 4 deletions src/main/scala/ee/hrzn/chryse/platform/ecp5/ULX3SPlatform.scala
Original file line number Diff line number Diff line change
Expand Up @@ -6,9 +6,11 @@ import ee.hrzn.chryse.platform.PlatformBoard
import ee.hrzn.chryse.platform.PlatformBoardResources
import ee.hrzn.chryse.platform.resource.Button
import ee.hrzn.chryse.platform.resource.ClockSource
import ee.hrzn.chryse.platform.resource.LED
import ee.hrzn.chryse.platform.resource.ResourceData
import ee.hrzn.chryse.platform.resource.SPIFlash
import ee.hrzn.chryse.platform.resource.UART
import ee.hrzn.chryse.tasks.BaseTask

// TODO: restrict the variants to those the ULX3S was delivered with.
// TODO: try one of these: https://github.com/emard/ulx3s/blob/master/doc/MANUAL.md#programming-over-wifi-esp32-micropython
Expand All @@ -18,8 +20,20 @@ case class ULX3SPlatform(ecp5Variant: ECP5Variant)
val id = s"ulx3s-${ecp5Variant.id}"
val clockHz = 25_000_000

val ecp5Package = "CABGA381"
val ecp5Speed = 6
val ecp5Package = "CABGA381"
val ecp5Speed = 6
override val ecp5PackOpts = Seq("--compress")

def program(bitAndSvf: BuildResult): Unit =
programImpl(bitAndSvf)

private object programImpl extends BaseTask {
def apply(bitAndSvf: BuildResult): Unit =
runCmd(
CmdStepProgram,
Seq("openFPGALoader", "-b", "ulx3s", "-m", bitAndSvf.bitPath),
)
}

val resources = new ULX3SPlatformResources
}
Expand All @@ -30,13 +44,21 @@ class ULX3SPlatformResources extends PlatformBoardResources {
val clock = ClockSource(25_000_000).onPin("G2")

val program =
Button().inverted.onPin("M4").withAttributes("PULLMODE" -> "UP")
LED().inverted.onPin("M4").withAttributes("PULLMODE" -> "UP")

// TODO: also expose RTS, DTR.
var uart = UART()
.onPins(rx = "M1", tx = "L4")
var uartTxEnable = ResourceData(Output(Bool())).onPin("L3")

val led0 = LED().inverted.onPin("B2").withAttributes("DRIVE" -> 4)
val led1 = LED().inverted.onPin("C2").withAttributes("DRIVE" -> 4)
val led2 = LED().inverted.onPin("C1").withAttributes("DRIVE" -> 4)
val led3 = LED().inverted.onPin("D2").withAttributes("DRIVE" -> 4)
val led4 = LED().inverted.onPin("D1").withAttributes("DRIVE" -> 4)
val led5 = LED().inverted.onPin("E2").withAttributes("DRIVE" -> 4)
val led6 = LED().inverted.onPin("E1").withAttributes("DRIVE" -> 4)
val led7 = LED().inverted.onPin("H3").withAttributes("DRIVE" -> 4)
// val leds =
// resource
// .LEDs()
Expand All @@ -45,7 +67,7 @@ class ULX3SPlatformResources extends PlatformBoardResources {

val spiFlash = SPIFlash()
.onPins(
csN = "R2", clock = USRMCLK, copi = "W2", cipo = "V2", wpN = "Y2",
csN = "R2", clock = USRMCLKPin, copi = "W2", cipo = "V2", wpN = "Y2",
holdN = "W1",
)
.withAttributes("PULLMODE" -> "NONE", "DRIVE" -> "4")
Expand Down
12 changes: 5 additions & 7 deletions src/main/scala/ee/hrzn/chryse/platform/ecp5/USRMCLK.scala
Original file line number Diff line number Diff line change
@@ -1,11 +1,9 @@
package ee.hrzn.chryse.platform.ecp5

import ee.hrzn.chryse.platform.resource.Pin
import ee.hrzn.chryse.platform.resource.PinPlatform
import chisel3._
import chisel3.experimental.ExtModule

import scala.language.implicitConversions

object USRMCLK {
implicit def usrmclk2Pin(usrmclk: this.type): Pin =
PinPlatform(this)
class USRMCLK extends ExtModule {
val USRMCLKI = IO(Input(Clock()))
val USRMCLKTS = IO(Input(Bool()))
}
11 changes: 11 additions & 0 deletions src/main/scala/ee/hrzn/chryse/platform/ecp5/USRMCLKPin.scala
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
package ee.hrzn.chryse.platform.ecp5

import ee.hrzn.chryse.platform.resource.Pin
import ee.hrzn.chryse.platform.resource.PinPlatform

import scala.language.implicitConversions

object USRMCLKPin {
implicit def usrmclk2Pin(usrmclk: this.type): Pin =
PinPlatform(this)
}
8 changes: 4 additions & 4 deletions src/test/scala/ee/hrzn/chryse/platform/SimPlatform.scala
Original file line number Diff line number Diff line change
Expand Up @@ -4,12 +4,12 @@ import chisel3._
import ee.hrzn.chryse.ChryseApp
import ee.hrzn.chryse.platform.PlatformBoard
import ee.hrzn.chryse.platform.PlatformBoardResources
import ee.hrzn.chryse.platform.ecp5.USRMCLK
import ee.hrzn.chryse.platform.ecp5.USRMCLKPin
import ee.hrzn.chryse.platform.resource.Button
import ee.hrzn.chryse.platform.resource.Connector
import ee.hrzn.chryse.platform.resource.InOut
import ee.hrzn.chryse.platform.resource.LED
import ee.hrzn.chryse.platform.resource.UART
import ee.hrzn.chryse.platform.resource.Button
import ee.hrzn.chryse.platform.resource.InOut

final case class SimPlatform() extends PlatformBoard[SimPlatformResources] {
type TopPlatform[Top <: Module] = SimTop[Top]
Expand Down Expand Up @@ -61,7 +61,7 @@ class SimPlatformResources extends PlatformBoardResources {
val spiFlash = resource
.SPIFlash()
.onPins(
csN = "R2", clock = USRMCLK, copi = "W2", cipo = "V2", wpN = "Y2",
csN = "R2", clock = USRMCLKPin, copi = "W2", cipo = "V2", wpN = "Y2",
holdN = "W1",
)
}

0 comments on commit da11870

Please sign in to comment.