FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool

This repository contains my assignments and projects for the Digital Systems course. The course covers the fundamental concepts of digital systems, including Boolean algebra, logic gates, combinational and sequential circuits, memory, and programmable logic devices. I have included VHDL code and simulation results for some of the projects.

An automatic traffic light controller is designed and simulated using the concept of Finite State Machine in ModelSim.

This is a projects have been completed through 2 parts of nand2tetris course on coursera.

An execution unit that is able to do the following commands: Move Value to Register, Move Register to Register, Add Value to Register, Add Register to Register, AND Value to Register and AND Register to Register.

Digital Design Lab - Autumn Semester 2021 - Indian Institute of Technology Bombay

VHDL Lab Exercises from simple Combinational/Sequential circuits to a simple CPU design

Java-based application for simulating sequential and logic circuits of high complexity.

This repository contains the solutions of the problems given on HDLbits site.

It contains the VHDL coding of basic combinational and sequential circuits as well as top level design including Datapath and Controller

A full hardware implementation of the AES using Verilog, supporting SPI communication between all modules.

This project implement a synchronous sequential circuit which detects two different 4-bit sequences, A and B.

Digital Electronics Project

This repository focuses on designing and simulating logical circuits using Verilog HDL (Hardware Description Language) with the Icarus Verilog simulator.

🚀 This collection contains experiments focusing on the basics of digital logic gates using common ICs, equivalent circuits, and practical implementation using a breadboard. Investigates the functional truth tables of gates and simplification procedures using Boolean math's , Karnaugh mapping, de-Morgan's law etc.

A number caller for a specific sequence of numbers which are given in the requirements folder. All type of circuit design is done in the circ files. CSE231 project for North South University students.

Compilation of Verilog behavioral models and test benches for the four types of flip-flops (SR, JK, D, and T)

This repository contains the verilog implementation of basic combinational and sequential digital circuits.